TABLE III. Group A inspection for device type 06 - Continued. 1/
Subgroup |
Symbol |
MIL- STD- 883 method |
Cases R,Y |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
Measured terminal |
Test limits |
Unit |
|
Test no. |
A0 |
A1 |
A2 |
A3 |
A4 |
A5 |
A6 |
DQ |
WE |
VSS |
CE |
DIN |
A7 |
A8 |
A9 |
A10 |
A11 |
A12 |
A13 |
VCC |
Min |
Max |
|||||
4 TC=+25°C |
CIN COUT |
3012 |
43 44 |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
9/ |
Each input Each output |
8 10 |
pF pF |
|||
9 TC=+25°C |
NOT WRITE |
See fig. 7 |
45 46 |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
10/ 10/ |
4.5 V 5.5 V |
DIN DIN |
10/ 10/ |
10/ 10/ |
ns " |
WRITE/ WRITE |
See fig. 8 |
47 48 |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
11/ 11/ |
4.5 V 5.5 V |
DIN DIN |
11/ 11/ |
11/ 11/ |
" " |
|
10 |
Same tests, terminal conditions, and limits as for subgroup 9, except TC = +125°C. |
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11 |
Same tests, terminal conditions, and limits as for subgroup 9, except TC = -55°C. |
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1/ Pins not designated may be "high" level logic, or "low" level logic. Exceptions are the input/output terminals, in the output condition, may be open.
2/ All input levels and timing edges are set to table I limits with read cycle timing: VIL = 0.4 V and VIH = 2.2 V for device type 06.
3/ Outputs loaded with load as specified on figure 5.
4/ Test is done with addresses held stable, and all inputs held at VIL = 0.4 V and VIH = 2.2 V for device type 06.
5/ Test is done with addresses held stable, and all inputs held at VIL = 0.4 V and VIH = VCC - 0.3 V.
6/ Test is done with addresses held stable, VCC = 2.0 V, and all other inputs held at VCC. The data retention test condition shall be held for 250 milliseconds before measurements. The data must remain valid after power is returned to device.
7/ An input preconditioning logic sequence shall be applied that results in a logic "0" at the output to be measured. Logic input levels and forcing current during measurement shall be: VIL = 0.8 V, IOL = 8.0 mA.
8/ An input preconditioning logic sequence shall be applied that results in a logic "1" at the output to be measured. Logic input levels and forcing current during measurement shall be: VIH = 2.2 V, IOH = -4.0 mA.
9/ See 4.4.1c.
10/ Since the object of the NOT WRITE pattern (see figure 7) is to verify that the device may not be written into when it is disabled, the waveforms shown on figure 4 may be applied using normal timing. The outputs shall be loaded with the load specified on figure 5.
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