TA8LE III. Group A inspection for device type 06 - Continued.
Symbol |
MIL- STD- 883 method |
Cases J,K,U |
Terminal conditions and limits 1/ |
Measured terminal |
Test limits |
Unit |
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Symbol |
88 |
87 |
86 |
85 |
84 |
83 |
82 |
81 |
AE |
Serial In |
A/8 |
VSS |
P/S |
A/S |
Clock |
A1 |
A2 |
A3 |
A4 |
A5 |
A6 |
A7 |
A8 |
VDD |
Subgroup 9 TC = 25°C |
Subgroup 10 TC = 125°C |
Subgroup 11 TC = -55°C |
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Test no. |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
23 |
24 |
Min |
Max |
Min |
Max |
Min |
Max |
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fCL (max) 16/ |
267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
5.0V " " " " " " " " " " " " " " " |
IN " " " " " " " " " " " " " " " |
GND " " " " " " " 5.0V " " " " " " " |
GND " " " " " " " " " " " " " " " |
GND " " " " " " " " " " " " " " " |
GND " " " " " " " " " " " " " " " |
IN " " " " " " " " " " " " " " " |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
OUT |
5.0V " " " " " " " " " " " " " " " |
Clock " " " " " " " " " " " " " " " |
1.3 " " " " " " " " " " " " " " " |
1.9 " " " " " " " " " " " " " " " |
1.3 " " " " " " " " " " " " " " " |
µs " " " " " " " " " " " " " " " |
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1/ Terminals not designated may be "HIGH" level logic, "LOW" level logic, or open except as follows: VIC(POS) tests; the VSS terminal shall be open.
VIC(NEG) tests; the VDD terminal shall be open.
ISS tests; the output terminals shall be open.
IIH1 tests; the undesignated terminals shall be open.
2/ In device type 06, circuit C, all terminals except 12 and 24 are inputs connected to gate structures; therefore, the table III, VIC(POS) and VIC(NEG)
tests shall be expanded to include testing terminals 1 through 8, and 16 through 23.
3/ Test numbers 13 through 23 shall be run in sequence. See 4.5.3.
4/ IOH = -50 µA at 25°C, -35 µA at 125°C, -75 µA at -55°C.
5/ Apply clock pulse; VIN = 0 V to VDD until proper output state is achieved.
6/ VIH1 = 3.8 V at 25°C, 3.6 V at 125°C, 3.95 V at -55°C.
7/ VIH2 = 9.5 V at 25°C, 9.25 V at 125°C, 9.75 V at -55°C.
8/ IOL = 100 µA at 25°C, 70 µA at 125°C, 124 µA at -55°C.
9/ VIL1 = 1.1 V at 25°C, 0.85 V at 125°C, 1.35 V at -55°C.
10/ VIL2 = 2.8 V at 25°C, 2.55 V at 125°C, 3.05 V at -55°C.
11/ The device manufacturer may, at his option, measure IIL and IIH at 25°C for each individual input or measure all inputs together.
12/ See 4.4.1c.
13/ Test numbers 144 through 170 shall be run in sequence.
14/ The output voltage limits for each temperature are "H" = VDD -0.5 V min. and "L" = VSS +0.5 V max.
15/ The functional tests shall be performed at VIH and VDD ≤ 5.0 V and � 15 V.
16/ The maximum clock frequency (fCL) requirement is considered met if proper output state changes occur with the pulse repetition period set to that given in the
limits column.
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