MIL-M-38510-57 Microcircuits, Digital, Cmos, Static Shift Register, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - 35 - 36 - 37 - 38 - 39 - 40 - 41 - 42 - 43 - 44 - 45 - 46 - 47 - 48 - 49 - 50 - 51 - 52 - 53 - 54 - 55 - 56 - 57 - 58 - 59 - 60 - 61 - 62 - 63 - 64 - 65 - 66 - 67 - 68 - 69 - 70 - 71 - 72 - 73 - 74 - 75 - 76 - 77 - 78 - 79 - 80 - 81 - 82 - 83 - 84 - 85 - 86 - 87 - 88 - 89 - 90 - 91 - 92

MIL-M-38510/57F

Device types 01 and 51

NOTES:

1. The pulse generators have the following characteristics: VGEN = VDD ±1 percent, tf and tr ≤ 20 ns, duty cycle = 50 percent, ZOUT = 50n.

2. tSETUPH = tSETUPL = 80 ns at TA = 25°C and -55°C; tSETUPH = tSETUPL = 115 ns at TA = 125°C.

3. Requirements for MAX clock frequency (fCL) are established by setting the parameter to the limits given

in table III and observing proper output state changes.

4. Initially, apply clock input pulses with data inputs low and set all outputs low.

FIGURE 4. Switching time test circuit and waveforms.