MIL-M-38510-245 Microcircuits, Digital, Cmos, 4096 Bit, Static Random Access Memory Sram, Bulk Silicon And Silicon On SapphireThis specification covers the detail requirements for bulk silicon and silicon on sapphire SOS, static, 4096 bit, random access memory microcircuits. Two product assurance classes, four radiation hardness assurance levels, and a choice of case outlines and lead finishes are provided and are reflected in the part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4

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MIL-M-38510/2458

TRUTH TA8LE

Time reference	Inputs			Data I/0	Function
Time reference	CE	W	A	DQ	Function
-1	H	x	x	z	Memory disable
0		H	v	z	Cycle begins, addresses are latched
1	L	H	x	x	Read mode, output enabled
2	L	H	x	v	Read mode, output valid
3	L	L	x	z	Write mode, output high z
4	L		x	v	Write mode, data is written
5		H	x	z	Write completed
6	H	x	x	z	Prepare for next cycle (same as -1)
7		H	v	z	Cycle ends, next cycle begins (same as 0)

If the pulse width of W is relatively short in relation to that of CE , a combination read-write cycle may be performed. If W remains high for the first part of the cycle, the outputs will become active during time (T = 1). Data out will be valid during time (T = 2). After the data is read, W can go low. After minimum tWLWH, W may return high. The information just written may now be read or CE may return high, disabling the output buffers and preparing the device for the next cycle. Any number or sequence of read-write operations may be performed while CE is low

providing all timing requirements are met .

N0TE: See figure 5 for test conditions.

FIGURE 4. Read cycle, write cycle, read /modify/write cycle waveforms and truth tables - Continued.