MIL-M-38510-245 Microcircuits, Digital, Cmos, 4096 Bit, Static Random Access Memory Sram, Bulk Silicon And Silicon On SapphireThis specification covers the detail requirements for bulk silicon and silicon on sapphire SOS, static, 4096 bit, random access memory microcircuits. Two product assurance classes, four radiation hardness assurance levels, and a choice of case outlines and lead finishes are provided and are reflected in the part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4

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Test

Symbol

Conditions

VSS  = 0 V, VDD = 5.5 V

-55°C ≤ TC  ≤ +125°C

unless otherwise specified

Device

Type

Limits

Units

Min

Max

Quiescent supply current

IDD or ISS

VDD  = 5.5 V

01, 02

50

µA

03

200

04

250

VDD  = 5.25 V

05, 06

-1000

Data retention supply voltage

PWR DWN

Functional test

01, 02

2.0

V

03, 04

3.0

05, 06

2.5

Operating current

IDDOP

VDD  = 5.5 V     TC = +25°C

f = 1 MHz

01, 02, 03, 04

?

mA

VDD  = 5.25 V     TC  = +25°C

f = 1 MHz

05

4.5

06

6

Data retention quiescent supply current

ICCDR

VDD  = 2 V     IOUT  = 0

VIN  = rail voltages

01, 02

25

µA

VDD  = 3 V     IOUT  = 0

VIN  = rail voltages

03

100

04

100

VDD  = 2.5 V     IOUT  = 0

VIN  = rail voltages

05

400

06

500

Input capacitance

CI

VDD  = 5.5 V    VIN  = rail voltage

f = 1 MHz

01, 02

8

pF

03, 1/

8

04 1/

10

05, 06  1/

5

Address access time

tAVQV

See table III

01, 02

120

ns

03, 04

320

05, 06

250

Chip enable access time

tELQV

01, 02

120

ns

03, 04

300

05

280

06

280

Chip enable output time 1/

tELQX

01, 02

5

ns

03, 04

50

06

20