MIL-M-38510-245 Microcircuits, Digital, Cmos, 4096 Bit, Static Random Access Memory Sram, Bulk Silicon And Silicon On SapphireThis specification covers the detail requirements for bulk silicon and silicon on sapphire SOS, static, 4096 bit, random access memory microcircuits. Two product assurance classes, four radiation hardness assurance levels, and a choice of case outlines and lead finishes are provided and are reflected in the part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4

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MIL-M-38510/2458

TA8LE I. Electrical performance characteristics.

Test	Symbol	Conditions VSS = 0 V, VDD = 5.5 V -55°C ≤ TC ≤ +125°C unless otherwise specified	Device Type	Limits		Units
Test	Symbol		Device Type	Min	Max	Units
Write enable read mode setup time	tWHEL	See table III	01, 03	0		ns
Early write pulse hold time	tELWH		01	40		ns
			02	120
			03	80
			04	300
			05	205
			06	200
Data setup time	tDVWL		01, 03	0		ns
Early write data setup time	tDVEL		01, 03	0		ns
Data hold time	tWLDX		01	25		ns
Data hold time	tWLDX		03	80		ns
Early write data hold time	tELDX		01	25		ns
Early write data hold time	tELDX		03	80		ns
Data valid to write time	tQVWL		01, 03	0		ns
Read or write cycle time	tELEL		01, 02	170		ns
	tELEL		03, 04	420
	tAVAV		05, 06	250
Write enable output disable time 1/	tWLQZ		02		50	ns
Write enable output disable time 1/	tWLQZ		04		100	ns
Data hold time	tWHDX		02	0		ns
			04	30
			05	10
			06	5
Write data delay time	tWLDV		02	70		ns
Write data delay time	tWLDV		04	100		ns
Late output high-Z time	tEHWH		02, 04	0		ns
Address setup to end of write time	tAVWH		05	205		ns
Address setup to end of write time	tAVWH		06	200		ns
Address to write setup time	tAVWL		05	0		ns
Address to write setup time	tAVWL		06	0		ns