MIL-M-38510/210F
1/ For unprogrammed devices, apply 13.0 V on pin 1(A7) and pin 2 (A6), for device types 01 and 02, and on pin 1 (A8) for device type 05 for circuit A devices.
2/ For programmed devices, select an appropriate address to acquire the desired output state. VIH = 2.0 V, VIL = 0.8 V.
3/ IOL = 8 mA for circuits C, G, and K. IOL = 16 mA for circuits A, B, D, F, H, I, and J.
4/ The functional tests shall verify that no fuses are blown for unprogrammed devices or that the altered item drawing pattern exists for programmed devices (see table II and 3.3.2.1). All bits shall be tested. Terminal conditions shall be as follows:
a. Inputs: H = 2.4 V, L = 0.4 V
b. Outputs: Output voltage shall be:
H 1.5 V and L ≤ 1.5 V.
c. The functional tests shall be performed with VCC = 4.5 V and VCC = 5.5 V.
5/ GALPAT (programmed PROM). This program will test all bits in the array, the addressing and interaction between bits for ac performance, tPHL1 and tPLH1. Each bit in the pattern is fixed by being programmed with an "H" or "L".
Description:
1. Word 0 is read.
2. Word 1 is read.
3. Word 0 is read.
4. Word 2 is read.
5. Word 0 is read.
6. The reading procedure continues back and forth between word 0 and the next higher numbered word until word 2047 or 4095 is reached, then increments to the next word and reads back and forth as in step 1 through 7 and shall include all words.
7. Pass execution time = (n2 + n) x cycle time. n = 2048 or 4096.
8. The GALPAT tests shall be performed with VCC = 4.5 V and 5.5 V.
6/ The outputs are loaded per figure 4.
7/ tPHL1, tPLH1 = 100 ns for device types 01 and 02 and 55 ns for device types 03 and 04.
8/ Sequential test (programmed PROM). This program will test all bits in the array for tPHL2 and tPLH2.
Description:
1. Each word in the pattern is tested from the enable lines to the output lines for recovery.
2. Word 0 is addressed. Enable line is pulled HI to LO and LO to HI. tPHL2 and tPLH2 are read.
3. Word 1 is addressed. Same enable sequence as above.
4. The reading procedure continues until word 2047 or 4095 is reached.
5. Pass execution time = 2048 x cycle time (or 4096 x cycle time).
6. The sequential tests shall be performed with VCC = 4.5 V and 5.5 V.
9/ tPHL2, tPLH2 = 50 ns for device types 01 and 02 and 30 ns for device types 03 and 04.
10/ For uprogrammed devices, apply 13 V on pin 8 (A0) for circuit I devices.
11/ For unprogrammed devices, 12.0 V on pin 6 (A2) and 0.0 V on pin 5 (A3) for circuit F devices.
12/ For unprogrammed devices, apply 13 V on pin 2 (A6) for circuit I devices.
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