MIL-M-38510/210F
j. If the bit verifies as having been programmed at VCC = 6.5 V, then one of the following two conditions shall be followed:
(1) If the current required to program was less than IOP(max), then proceed to step 1.
(2) If the current required to program was equal to or greater than IOP(max), then the device shall be considered a reject and no further attempts at programming other bits shall be attempted.
k. Repeat 4.11a through 4.11j for all other bits to be programmed.
l. If any bit does not verify as programmed, it shall be considered a programming reject.
4.12 Programming procedures for circuit E. The programming characteristics for this device have been discontinued.
4.13 Programming procedures for circuit F. The programming characteristics on table IVF and the following procedures shall be used for programming the devices:
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5F and the programming characteristics of table IVF shall apply to these procedures.
b. Raise VCC to 5.5 V.
c. Address the PROM with binary address of the selected word to be programmed. Address inputs are
TTL compatible.
d. Disable the chip by applying VIH to the CE inputs and VIL to the CE inputs. The chip enable inputs are
TTL compatible.
e. Apply the VPP pulse to the programming pin CE 1. In order to insure that the output transistor is OFF before increasing voltage on the output pin, the program pins voltage pulse shall precede the output pins programming pulse by TD1 and leave after the programming pins programming pulse by TD2 (see figure 5F).
f. Apply one VOUT pulse with duration of tP to the output selected for programming. The outputs shall be programmed one output at a time, since internal decoding circuitry is capable of sinking only one unit of programming current at a time.
Note: The PROM is supplied with fuses generating a high-level logic output. Programming a fuse will cause the output to go to a low-level logic in the verify mode.
g. Other bits in the same word may be programmed sequentially by applying VOUT pulses to each output to be programmed.
h. Repeat 4.13b through 4.13g for all other bits to be programmed.
i. Enable the chip by applying VIL to the CE inputs and VIH to the CE inputs, and verify the program.
Verification may check for a low output by requiring the device to sink 12 mA at VCC = 4.2 V and 0.2 mA
at VCC = 6.2 V at TC = 25°C.
j. If any bit does not verify as programmed, it shall be considered a programming reject.
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