MIL-M-38510-209 Microcircuit, Digital, 8192-Bit, Schottky, Bipolar, Programmable Read-Only Memory Prom, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, PROM microcircuits which employ thin film nichrome NiCr resistors, zapped vertical emitter, tungsten W, titanium tungsten TiW, or platinum silicide as the fusible link or programming element. Two product assurance class and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/209H

4.10 Programming procedure for circuit D. The waveforms on figure 5D, the programming characteristics in table IVD and the following procedures shall apply for programming the device:

a. Connect the device in the electrical configuration for programming.

b. Select the word to be programmed by applying the appropriate voltages to the address pins as well as the required voltages to chip enable pins to select the device.

c. Apply the proper power, VCC = 6.5 V, GND = 0 V.

d. Verify that the bit to be programmed is in the "O" logic state.

e. Enable the chip for programming by application of the chip enable voltage, VP(CE) = 21.0 V, CE 2, CE3, and CE4 should be left high, and CE 1 should remain low.

f. Apply IOP programming current ramp to the output to be programmed. The other outputs shall be left open. Only one output may be programmed at a time. During the rise of the current ramp, the required current will be achieved to program the junction. As programming occurs, a drop in voltage can be sensed

at the output of the device. Upon detection of Vps, the current shall be held for thap and then shut off.

g. Verify that the programmed bits is in the "1" logic state. Lower VP(CE1) to 0 V and read the output.

Note that the PROM is supplied with fuses generating a low level logic output. Programming a fuse will

cause the output to go to a high level logic in the verify mode.

h. Lower VCC to 0 V. The power supply duty cycle shall be equal to or less than 50 percent.

i. If the bit verifies as not having been programmed at VCC = 6.5 V, repeat the programming ramp sequence up to 15 times until the bit is programmed. If after 16 programming attempts, the bit does not program, the device shall be considered a reject.

j. If the bit verifies as having been programmed at VCC = 6.5 V, one of the following two conditions shall be followed:

(1) If the current required to program was less than IOP(max), proceed to 4.10 k.

(2) If the current required to program was equal to or greater than IOP(max), the device shall be considered a reject and no further attempts at programming other bits shall be attempted.

k. Repeat 4.10a through 4.10j for all other bits to be programmed.

l. For class S and B devices, if any bit does not verify as programmed, it shall be considered a programming reject.