MIL-M-385101209H
TABLE III. Group A inspection - Continued.
11 For programmed devices, select an appropriate address to acquire the desired output state.
21 For unprogrammed device types 01 (circuit A), apply 10.0 V on pin 1 (A6) and for unprogrammed device type 02 (circuit A), apply 13.0 V on pins 1 and 2 (A6, A5); for unprogrammed device types 03, apply 10.0 V on pin 1 (A7) and for the unprogrammed device type 04, apply 13.0 V on pins 1 and 2 (A7, A6) (circuit A).
31 IOL = 12 mA for circuits A, C, E, G and H devices; IOL = 16 mA for circuits B, D, and F devices.
41 The functional tests shall verify that no fuses are blown for unprogrammed devices or that the truth table specified in the altered item drawing exists for programmed devices (see table II and 3.3.2.2).
All bits shall be tested. The functional tests shall be performed with VCC = 4.5 V and VCC = 5.5 V. Terminal conditions shall be as follows:
a. Inputs: H = 3.0 V, L = 0.0 V.
b. Outputs: Output voltage shall be either:
(1) H = 2.4 V minimum and L = 0.5 V maximum when using a high speed checker double comparator, or
(2) H � 1.0 V and L < 1.0 V when using a high speed checker single comparator.
51 GALPAT (PROGRAMMED PROM).
This program will test all bits in the array, the addressing and interaction between bits for ac performance tPLH1 and tPHL1 . Each bit in the pattern is fixed by being programmed with an "H" or "L". The GALPAT tests shall be performed with VCC = 4.5 V and 5.5 V. For manufacturer-programmed PROM only (see 3.8.2).
When testing device type 10, the tPHL1 and tPLH1 limits shall be verified by performing a sequential test
pattern outline in footnote 71.
Description:
Step 1. Word 0 is read. Step 2. Word 1 is read. Step 3. Word 0 is read Step 4. Word 2 is read. Step 5. Word 0 is read.
Step 6. The reading procedure continues back and forth between word 0 and the next higher numbered word until word 1023 or 2047 (as applicable) is reached, then increments to the next word and reads back and forth as in step 1 through step 6 and shall include all words.
Step 7. Pass execution time = ( n2 + n ) x cycle time. n = 1024 or 2048 (as applicable).
61 The outputs are loaded per figure 6.
71 SEQUENTIAL (PROGRAMMED PROM).
This program will test all bits in the array for tPHL2 and tPLH2. The sequential tests shall be performed with
VCC = 4.5 V and 5.5 V.
Description:
Step 1. Each word in the pattern is tested from the enable lines to the output lines for recovery.
Step 2. Word 0 is addressed. Enable line is pulled high to low and low to high. tPHL2 and tPLH2 are read. Step 3. Word 1 is addressed. Same enable sequence as above.
Step 4. The reading procedure continues until word 1023 or 2047 (as applicable) is reached.
Step 5. Pass execution times 1024 or 2048 (as applicable) x cycle time.
45
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