MIL-M-38510/555B
6.5.1 Pinout description - Continued.
TA0-TA4 |
5-bit terminal address input. These lines are strobed into the internal terminal address latch during a control register load (TALEN/PARITY = 1) or when TALEN/PARITY is low. |
EXT TST CH SEL A/B |
External test channel select. See table for TALEN/PARITY. |
EXT TST |
External test. Used for off-board device testing. Test function should not be used in system (Remote terminal) implementations. See table for TALEN/PARITY function. Can also be used to test external fail-safe hardware (see TIMERON description). |
ILL COM |
Illegal command. Input to identify present command as illegal. Used in conjunction with RTI indicators (see COMSTR description) to decode system dependent illegal commands. |
MC/SA |
Mode code/subaddress. Used to determine if MCSA lines contain mode code or subaddress information. When low, the output indicates if most recent command is a mode command. |
MCSA 0-4 |
5-bit mode code/subaddress output. If MC/SA is low, these lines contain the 5 least significant bits of the most recent command, the mode code. Otherwise, they contain the next 5 bits, the subaddress. |
MES ERR |
Message error. Active high output identifying that the message error bit has been set due to receipt of an illegal or invalid command, or error during message sequence. |
CH A/B |
Channel A/B. Output identifying the channel on which the most recent valid command was received. Channel A = 1, channel B = 0. |
XMIT |
Active low output identifies a transmit command message transfer is in process by the RTI. |
RCV |
Active low output identifies a receive command message transfer is in process by the RTI. |
BRDCST |
Active low output identifies receipt of a broadcast command. |
STATUS |
Active high output indicates that the RTI is in the process of transmitting its status word. |
BIPHASE IN 0 A, B BIPHASE IN Z A, B |
Manchester II encoded biphase serial data inputs for channels A and B. The biphase one inputs may be used as uniphase inputs if the associated biphase zero input is held at a logic high. |
BIPHASE OUT 0 A, B BIPHASE OUT Z A, B |
Manchester II encoded biphase serial data outputs for channels A and B. |
6.5.2 Terminology.
Host |
The device or system that controls the operation of the Remote Terminal Interface (e.g., microprocessor). |
Assert |
An active high signal that is asserted means that it has been placed at a logic 1. An active low signal that is asserted is placed at logic 0. |
Negate |
An active high signal is negated when it is brought back to a logic 0. An active low signal is negated when brought back to a logic 1. |
Status word |
The "status word" is the MIL-STD-1553B (see figure 12) response word that is transmitted by the Remote Terminal. The following bits in a status word are not supported by the RTI and are always at a logic 0: a. Dynamic bus control acceptance b. Instrumentation c. All reserved |
System register |
The system register is a 16-bit word obtained from RTI's data bus and reflects the current state of the RTI. |
Control register |
The control register is an 8-bit word that is written to the RTI via its data bus to control its operation and certain bits of the 1553B status word. |
Last command register |
The last command register is a 16-bit word obtained from the RTI's data bus and contains five system status bits and the last 11 bits of the last command that was processed in accordance with the protocol. |
23
For Parts Inquires call Parts Hangar, Inc (727) 493-0744
© Copyright 2015 Integrated Publishing, Inc.
A Service Disabled Veteran Owned Small Business