MIL-M-38510-208 Microcircuit, Digital, 4096-Bit Schottky, Bipolar, Programmable Read-Only Memory Prom, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, programmable read-only memory PROM microcircuits which employ thin film nichrome NiCr resistors, titanium-tungsten TiW, or zapped vertical emitter ZVE as the fusible link or programming element. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/208F

g. Other bits in the same word may be programmed sequentially by applying VOUT pulses to each output to be programmed.

h. Repeat steps 4.11c through 4.11g for all other bits to be programmed.

i. Enable the chip by applying VIL to the CE inputs and VIH to the CE inputs, and verify the program.

Verification may check for a low output by requiring the device to sink 12 mA at VCC = 4.0 V and 0.2 mA at

VCC = 7.0 V at TA = 25°C.

j. For class S and B devices, if any bit does not verify as programmed, it shall be considered a programming reject.

TABLE IVF. Programming characteristics for circuit F - Continued.

Parameter	Symbol	Conditions	Limits 1/			Unit
Parameter	Symbol	Conditions	Min	Recommended	Max	Unit
VCC required during programming	VCCP		5.4	5.5	5.6	V
Rise time of programming pulse data out or programming pin	tTLH		0.34	0.40	0.46	V/µs
Programming voltage on programming pin	VPP		32.5	33	33.5	V
Output programming voltage	VOUT		25.5	26	26.5	V
Programming pin pulse width ( CE )	tPP	Chip disabled, VCC = 5.5 V		100	180	ns
Pulse width of programming voltage	tP	Chip disabled, VCC = 5.5 V	1		40	µs
Required current limit of power supply feeding programming pin and output during programming	IL	VPP = 33 V, VOUT = 26 V, VCC = 5.5 V	240			mA
Required time delay between disabling memory output and application of output programming pulse	TD1	Measured at 10% levels	70	80	90	µs
Required time delay between removal of programming pulse and enabling memory output	TD2	Measured at 10% levels	100	----	----	ns
Output current during verification	IOLV1	Chip enabled, VCC = 4.0 V	11	12	13	mA
Output current during verification	IOLV2	Chip enabled, VCC = 7.0 V	0.19	0.2	0.21	mA
Address input voltage	VIH		2.4	5.0	5.5	V
Address input voltage	VIL		0.0	0.4	0.8	V
Maximum duty cycle during automatic programming of program pin and output pin	D. C.	tP/ tC	----	----	25	%

1/ TA = +25°C.