MIL-M-38510/208F
TABLE IVD. Programming characteristics for circuit D.
Parameter |
Symbol |
Conditions 1/ |
Limits |
Unit |
||
Min |
Recommended |
Max |
||||
VCC required during programming |
VCCP |
4.75 |
5.0 |
5.25 |
V |
|
Verification VCC read |
VCCL |
Programming read verify |
4.2 |
4.4 |
5.0 |
V |
Input voltage, high level "1" |
VIH |
Do not leave inputs open |
2.4 |
5.0 |
5.0 |
V |
Input voltage, low level "0" |
VIL |
Do not leave inputs open |
0 |
0 |
0.4 |
V |
Output programming voltage |
VOUT |
Applied to output to be programmed |
20 |
20.5 |
21 |
V |
Output programming current |
IOUT |
If pulse generator is used, set current limit to the max value |
100 |
mA |
||
Programming voltage transition time |
tTLH |
0.5 |
1.0 |
3.0 |
µs |
|
Programming pulse width |
tP |
50 |
100 |
180 |
µs |
|
Programming duty cycle |
D. C. |
Maximum duty cycle to maintain TA < +85°C |
20 |
20 |
% |
|
Required delay between disabling memory output and application of output programming pulse |
tD |
30 |
ns |
1/ Recommended TA = +25°C; maximum TA = +85°C.
4.11 Programming procedure for circuit F. The waveforms on figure 7f, the programming characteristics on table
IVF, and the following procedures shall apply:
a. Connect the device in the electrical configuration for programming. b. Raise VCC to 5.5 Volts.
c. Address the PROM with the binary address of the selected word to be programmed. Address inputs are
TTL compatible.
d. Disable the chip by applying VIH to the CE inputs and VIL to the CE inputs. The chip enable inputs are TTL
compatible.
e. Apply the VPP pulse to the programming pin CE 2. In order to insure that the output transistor is off before increasing voltage on the output pin, the programming pin's voltage pulse shall precede the output pin's programming pulse by TD1 and leave after the programming pin's programming pulse by TD2
(see figure 7f).
f. Apply only one VOUT pulse with duration of tP to the output selected for programming. The outputs shall be programmed one output at a time, since internal decoding circuitry is capable of sinking only one unit of programming current at a time. Note that the PROM is supplied with fuses generating a high-level logic output. Programming a fuse will cause the output to go to a low-level logic in the verify mode.
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