MIL-M-38510/208F
g. Other bits in the same word may be programmed sequentially while the VCC input is at the VPH level by applying VOPE pulses to each output to be programmed allowing a delay of tD between pulses as shown on figure 7a.
h. Repeat steps 4.7b through 4.7g for all other bits to be programmed.
i. Lower VCC to 4.5 volts following a delay of tD from the last programming pulse applied to an output.
j. Enable the chip by applying VIL to the CE 1 and CE 2 inputs and VIH to the CE3 and CE4 inputs and verify the program.
k. For class S and B devices, if any bit does not verify as programmed, it shall be considered a programming reject.
41
For Parts Inquires call Parts Hangar, Inc (727) 493-0744
© Copyright 2015 Integrated Publishing, Inc.
A Service Disabled Veteran Owned Small Business