MIL-M-38510-208 Microcircuit, Digital, 4096-Bit Schottky, Bipolar, Programmable Read-Only Memory Prom, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, programmable read-only memory PROM microcircuits which employ thin film nichrome NiCr resistors, titanium-tungsten TiW, or zapped vertical emitter ZVE as the fusible link or programming element. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/208F

h. Programming a fuse will cause the output to go to a high level logic in the verify mode. Other bits in the same word may be programmed sequentially while the VCC input is at the VCCP level by applying VOUT pulses to each output to be programmed allowing a delay to tD between pulses as shown on figure 7c.

i. Repeat 4.9.2c through 4.9.2h for all other bits to be programmed.

j. To verify programming after a tD (10 µs) delay, return FE1 to GND. Raise VCC to VCCH. The programmed output should remain in the high state. Again lower VCC to VCCL and verify that the programmed output remains in the high state.

k. For class S and B devices, if any bit does not verify as programmed it shall be considered a programming reject.

TABLE IVC. Programming characteristics for circuits C and H.

Parameter	Symbol	Conditions	Limits			Unit
Parameter	Symbol	Conditions	Min	Recommended	Max	Unit
Programming voltage to VCC	VCCP 1/	ICCP = 375 ±75 mA Transient or steady-state	8.5	8.75	9.0	V
Verification upper limit	VCCH		5.3	5.5	5.7	V
Verification lower limit	VCCL		4.3	4.5	4.7	V
Verify threshold	VS 2/		1.4	1.5	1.6	V
Programming supply current	ICCP	VCCP = 8.75 ±0.25 V	300		450	mA
Input voltage, high level "1"	VIH		2.4		5.5	V
Input voltage, low level "0"	VIL		0	0.4	0.8	V
Input current	IIH	VIH = 5.5 V			50	µA
Input current	IIL	VIL = 0.4 V			-500	µA
Output programming voltage	VOUT 3/	IOUT = 200 ±20 mA Transient or steady-state	16	17	18	V
Output programming current	IOUT	VOUT = 17 ±1 V	180	200	220	mA
Programming voltage transition time	tTLH		10		50	µs
CE programming pulse width	tP		300	400	500	µs
Pulse sequence delay	tD		10			µs

1/ Bypass VCC to GND with a 0.01 µF capacitor to reduce voltage spikes.

2/ VS is the sensing threshold of the PROM output voltage for a programmed bit. It normally constitutes the reference voltage applied to a comparator circuit to verify a successful fusing attempt.

3/ Care should be taken to insure the 17 ±1 V output voltage is maintained during the entire fusing cycle. The recommended supply is a constant current source clamped at the specified voltage limit.