MIL-M-38510-51 Microcircuits, Digital, Cmos, Flip-Flops And Latchets, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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TABLE III.  Group A inspection for device type 03 - Continued.

1/    Pins not designated may be "high" level logic, "low" level logic, or open.  Exceptions are as follows:  VIC(pos)  tests, the VSS  terminal shall be open; VIC(neg)  tests, the VDD  terminal shall be open; ISS tests, the output terminals shall be open.

2/    Test numbers 19 thru 24 shall be run in sequence.

3/    IOH  = -0.175 mA at 25°C, -0.12 mA at 125°C, -0.22 mA at -55°C.

4/    VIH1  = 3.8 V at 25°C, 3.6 V at 125°C, 3.95 V at -55°C.

5/    VIH2  = 9.5 V at 25°C, 9.25 V at 125°C, 9.75 V at -55°C.

6/    IOL = 0.20 mA at 25°C, 0.14 mA at 125°C, 0.25 mA at -55°C.

7/    VIL1 = 1.10 V at 25°C, 0.8 V at 125°C, 1.35 V at -55°C.

8/    VIL2 = 2.8 V at 25°C, 2.55 V at 125°C, 3.0 V at -55°C.

9/    The device manufacturer may, at his option, measure IIL  and IIH  at 25°C for each individual input or measure all inputs together.

10/  See 4.4.1c.

11/  Test numbers 78 thru 83 shall be run in sequence and the functional tests shall be performed with VIH  and VDD  ≤ 5.0 V and ; 15.0 V.

12/  L = VSS + 0.5 V maximum and H = VDD  - 0.5 V minimum.