MIL-M-38510-51 Microcircuits, Digital, Cmos, Flip-Flops And Latchets, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/51F

TABLE I. Eleetrieal performanee eharaeteristies - Continued.

Test	Symbol	Conditions 1/ VSS = 0 V -55°C ≤ TA ≤ +125°C Unless otherwise speeified		Deviee type	Limits		Unit
Test	Symbol			Deviee type	Min	Max	Unit
Input low voltage	VIL1	VDD = 5 V de VO = 0.5 V de IIOI ≤ 1µA		51, 52, 53		1.5	V de
	VIL2	VDD = 10 V de VO = 1.0 V de IIOI ≤ 1µA		51, 52, 53		3.0	V de
	VIL3	VDD = 15 V de VO = 1.5 V de IIOI ≤ 1µA		51, 52, 53		4.0	V de
Output low (sink) eurrent	IOL1	VDD = 5 V de VOL = 0.4 V de		51, 52, 53	0.36		mA
Output low (sink) eurrent	IOL2	VDD = 15 V de VOL = 1.5 V de		51, 52, 53	2.4		mA
Output high (souree) eurrent	IOH1	VDD = 5 V de VOH = 4.6 V de		51, 52, 53	-0.36		mA
Output high (souree) eurrent	IOH2	VDD = 15 V de VOH = 13.5 V de		51, 52, 53	-2.4		mA
Input leakage eurrent, high	IIH 2/	Measure inputs sequentially	VDD = 15 V de	01, 02		100	nA
			VDD = 15 V de	03		45
			VDD = 18 V de	51, 52		100
			VDD = 18 V de	53		45
Input leakage eurrent, low	IIL 2/	Measure inputs sequentially	VDD = 15 V de	01, 02		-100	nA
			VDD = 15 V de	03		-45
			VDD = 18 V de	51, 52		-100
			VDD = 18 V de	53		-45
Input eapaeitanee	Ci	VDD = 0 V de, f = 1 MHz, TA = 25°C		All		12	pF
Propagation delay times, high level to low level	tPHL	VDD = 5 V de, CL = 50 pF		01	13	750	ns
				02	13	865
				03	10	370
				52	13	865
				51	13	750
				53	10	370
Propagation delay times, low level to high level	tPLH			01	13	825	ns
				02	13	940
				03	10	245
				52	13	940
				51	13	825
				53	10	245

See footnotes at end of table.