MIL-M-38510-56 Microcircuits, Digital, Cmos, Counters/Dividers, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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51    This ISS  and truth table tests shall be performed in the test number sequence shown with no intervening changes to terminal conditions.  The truth table tests shall be performed with VIH  and VDD  ≤ 5.0 V and � 18.0 V.  Table III shows the lower of these two voltages.  During the functional test, input terminals designated "PA", "PB", etc., shall have applied thereto a specified number of single pulses with the following parameters:  Pulse amplitude = VDD  maximum to VDD  = 4% minimum.  These pulses are enumerated as follows:

Also during the truth table tests, device output voltages are:  don't care "X", high "H", and low "L" as specified in the terminal conditions columns.  The output voltage limits over the specified temperature range are "H" = VDD  -0.50 V minimum and "L" = VSS  +0.50 V maximum.

61    See figure 8 for switching time waveforms and test circuit.

71    Data pin need only be toggled high or low to allow outputs to achieve the proper setup state required to verify the indicated test parameter.