MIL-M-38510-238 Microcircuits, Digital, Mos, 4096 Bit Static Random Access Memory Ram, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, N-channel static MOS, 4096 bit random access memories. Two product assurance classes and a choice of case outlines/lead finish are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - 35 - 36

TABLE III.  Group A inspection for device type 06 - Continued.

Terminal conditions (pins not designated may be high 2.0 V; or low σ 0.8 V; or open).

6                 5                  4

3                 0                 1                  2

SS                                  4                3                 2                   1

9                   8                   7                   CC

1/  See appendix for description of algorithms.

2/  ICC  = 180 mA .

3/  VIL = GND, VIH  = 6.0 V,cycle time = 250  ms/loop max,  CS = high, only performed once at 125°C, and VCC  = 7.0 V min.

4/  VIL = 0.8 V and VIH  = 2.0 V.

5/  Algorithm has 60 ms where chip is deselected between the write.

6/  VIL = GND, VIH  = 3.0 V, and all address setup times are at minimums.

7/  VIL = GND, VIH  = 3.0 V and all write pulse timing are at a minimum.

8/  VIL = GND, VIH  = 3.0 V and all address ending timing are at minimums.

9/  VIL = GND, VIH  = 3.0 V, and tAA  is measured at minimum timing.

10/  VIL = GND, VIH = 3.0 V, tACS1 and tACS2 are measured at minimum timing.

11/  VIL = 0.8 V, VIH  = 2.0 V, and all parameters are measured at minimum timing.

For Parts Inquires call Parts Hangar, Inc (727) 493-0744
© Copyright 2015 Integrated Publishing, Inc.
A Service Disabled Veteran Owned Small Business