MIL-M-38510-238 Microcircuits, Digital, Mos, 4096 Bit Static Random Access Memory Ram, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, N-channel static MOS, 4096 bit random access memories. Two product assurance classes and a choice of case outlines/lead finish are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/2388

1.2.3  Case outlines.  The case outlines should be as designated in MIL-STD-1835 and as follows:

1.3  Absolute maximum ratings.

Voltage on any pin with respect to ground (01, 02).................................  -1.5 V to +7.0 V dc 2/ Voltage on any pin with respect to ground

(03, 04, 05, 06, 07)..................................................................................  -3.5 to +7.0 V dc

Storage temperature range  ....................................................................  -65° to 150°C Power dissipation:

Device type 01, 03, 05, 06, 07...........................................................  1.2 W Device type 02, 04 ............................................................................  1.0 W

Lead temperature (soldering, 5 seconds) ...............................................  270°C

Maximum junction temperature............................................................... TJ  = 150°C  3/ Thermal resistance, junction to case (εJC):.............................................. 25°C/W Maximum DC output current:

Device types 01, 03, 05, 06, 07........................................................     20 mA Device types 02, 04..........................................................................     5 mA

1.4  Recommended operating conditions.   2/

Device types 01, 02, 03, 04, 05, 06, and 07                                             Min            Max          Units

Supply voltages:

VCC .................................................................................................... 4.5              5.5         Vdc VSS ....................................................................................................   0                              Vdc High-level input voltage..................................................................... 2.0              VCC             Vdc Low-level input voltage...................................................................... -1.0             +0.8       Vdc Case temperature ............................................................................. -55°              +125°        C

Device type 01

Read cycle time (tRC)............................................................................... 85                              ns Address access time (tAA)........................................................................                    85          ns CS access time (tACS1)  4/........................................................................                    85          ns Chip select access time (tACS2) 5/............................................................                    100        ns Output hold time from address change (tOH) ........................................... 5                                ns

2/ Under absolute maximum ratings, the voltage values are with respect to the most negative supply  voltage, VSS.  Throughout the remainder of this specification, the voltage values are with respect to VSS.

3/  Maximum junction temperature (TJ) may be increased to 175°C during the burn-in and steady state life test.

4/  Chip deselected for greater than 55 ns prior to selection.

5/  Chip deselected for a finite time that is less than 55 ns prior to selection.

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