TABLE lll. Group A inspection for device type 01 - Continued.
Terminal conditions (pins not designated may be H > 2.0 V or L < 0.8 V or open).
11 A = normal clock pulse, except for subgroups 7 and 8 (see 41).
21 For device type 01, with schematics incorporating a 4 kn base resistor, the minimum and maximum limits shall be -0.5 and -1.4 mA, respectively. For schematics incorporating a 5 kn base resistor, the minimum and maximum limits shall be -0.5 and -1.4 mA, respectively. For schematics incorporating a 6 kn resistor, the minimum and maximum limits shall be -0.4 and -1.3 mA, respectively.
31 For device type 01, with schematics incorporating a 4 kn base resistor in the mode control input circuit, the minimum and maximum limits shall be -1.4 and -3.2 mA, respectively. For schematics incorporating a 5 kn base resistor, the minimum and maximum limits shall be -1.0 and -2.8 mA, respectively. For schematics incorporating a 6 kn resistor in the mode control input circuit, the minimum and maximum limits shall be -0.8 and -2.6 mA, respectively.
41 For subgroups 7 and 8, A = VCC, B = GND, and X = indeterminate.
51 The tests in subgroups 7 and 8 shall be performed in the sequence specified.
61 Output voltages shall be either:
(a) H = 2.4 V minimum and L = 0.4 V maximum when using a high speed checker double comparator or
(b) H > 1.5 V and L < 1.5 V when using a high speed checker single comparator.
71 Only a summary of attribute data is required.
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