TABLE III. Group A inspection for device type 03 - Continued.
Terminal conditions (pins not designated may be high > 2.0 V, low < 0.8 V, or open).
|
Subgroup |
Symbol |
MIL- STD-883 method |
Cases X,2 11 |
2 |
3 |
4 |
6 |
8 |
9 |
10 |
12 |
13 |
14 |
16 |
18 |
19 |
20 |
Measured terminal |
Test limits |
Unit |
|
Cases A, B,C,D |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
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Test no. |
CLK 1 |
K1 |
J1 |
PRE 1 |
Q1 |
Q1 |
GND |
Q2 |
Q2 |
PRE 2 |
J2 |
K2 |
CLK 2 |
VCC |
Min |
Max |
|||||
10 TC = +125°C |
fMAX 81 |
Fig. 10 |
116-119 |
Same tests and terminal conditions as subgroup 9, except TC = +125°C and limits are as shown. |
60 |
MHz |
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tPLH1 |
Fig. 9 |
120-121 |
2.0 |
11.0 |
ns |
||||||||||||||||
tPLH2 |
Fig. 10 |
122-123 |
" |
" |
" |
||||||||||||||||
tPLH3 |
Fig. 10 |
124-125 |
" |
" |
" |
||||||||||||||||
tPHL1 |
Fig. 9 |
126-127 |
" |
" |
" |
||||||||||||||||
tPHL2 |
Fig. 10 |
128-129 |
" |
" |
" |
||||||||||||||||
tPHL3 |
Fig. 10 |
130-131 |
" |
" |
" |
||||||||||||||||
tSET(H) |
Fig. 11 |
132-135 |
91 |
||||||||||||||||||
tSET(L) |
Fig. 11 |
136-139 |
" |
||||||||||||||||||
t(HOLD) (L) |
Fig. 12 |
140-143 |
" |
||||||||||||||||||
t(HOLD) (L) |
Fig. 12 |
144-147 |
" |
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11 |
Same tests, terminal conditions, and limits as for subgroup 10, except TC = -55°C. |
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11 Cases X and 2 terminals not designated are NC.
21 C = Normal clock pulse.
D = Momentary connection: 5.0 V to GND to 5.0 V before measurement is made (for subgroups 9, 10, 11, D occurs prior to other input pulses). E = Normal input conditioning is 2.7 V, however, momentary logic "0" may be applied to input for synchronizing test equipment and for
preconditioning the device.
F = Momentary GND, then open.
31 For circuit B, IIL4(min) is -0.7 mA.
41 For circuit B, IOS(max) is -110 mA.
51 Only a summary of attributes data is required.
61 Inputs: A = 2.4 V minimum, B = 0.4 V.
71 Outputs: H � 1.5 V, L ≤ 1.5 V.
81 fMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall be one-half of the input frequency.
91 Monitor output to verify functionally with t(SET) and t(HOLD) limit conditions as shown on figures 11 and 12.
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