MIL-M-38510-71 Microcircuits, Digital, Bipolar, Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic, silicon, Schottky TTL, bistable logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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Test

Symbol

Conditions  1/

-55°C ≤ TC ≤ +125°C

Device type

Limits

Units

Min

Max

Propagation delay time,

low-to-high level, clock to  Q

tPLH3

VCC = 5.0 V; RL = 280 Ω; CL = 50 pF

03

2

11.0

ns

Propagation delay time,

high-to-low level, clock to Q

tPHL3

2

11.0

ns

Maximum clock frequency

fMAX

VCC = 5.0 V; RL = 280 Ω; CL = 50 pF

04

60

6/

MHz

Propagation delay time,

low-to-high level, preset or clear to Q or  Q

tPLH1

2

11.0

ns

Propagation delay time,

high-to-low level, clock to Q or  Q

tPHL2

2

11.0

ns

Propagation delay time,

low-to-high level, clock to Q or  Q

tPLH2

2

11.0

ns

Propagation delay time,

high-to-low level, preset or

clear to Q or  Q .  Clock high

tPHL3

2

11.0

ns

Maximum clock frequency

fMAX

VCC = 5.0 V; RL = 280 Ω; CL = 50 pF

05

55

5/

MHz

Propagation delay time,

low-to-high level, clock to Q

tPLH1

2.0

17.0

ns

Propagation delay time,

high-to-low level, clock to Q

tPHL1

2.0

23.0

ns

Propagation delay time,

low-to-high level, clock to Q, clear inactive

tPLH2

2.0

17.0

ns

Propagation delay time,

high-to-low level, clear to Q

tPHL2

2.0

29.0

ns