MIL-M-38510-71 Microcircuits, Digital, Bipolar, Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic, silicon, Schottky TTL, bistable logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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Subgroup

Symbol

MIL- STD-883 method

Case X,2

1/

2

3

4

5

7

8

9

10

12

13

14

15

17

18

19

20

Measured terminal

Test limits

Unit

Cases

E,F

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Test no.

CLK 1

K1

J1

PRE 1

Q1

Q1

Q2

GND

Q2

PRE 2

J2

K2

CLK 2

CLR 2

CLR 1

VCC

Min

Max

7  5/  6/

TC = +25°C

93

94

95

B A B

A " "

A "

"

A " "

H H L

L L H

L L H

GND "

"

H H L

A "

"

A "

"

A "

"

B A B

A "

"

A "

"

4.5 V "

"

All outputs "

H or L 7/ as shown "

V "

"

8  5/  6/

Same tests, terminal conditions and limits as for subgroup 7, except TC = +125°C and -55°C.

9

TC = +25°C

fMAX

8/

Fig. 7 "

" "

96

97

98

99

IN (A) IN (A)

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

OUT

OUT

OUT

GND "

" "

OUT

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

IN (A) IN (A)

2.7 V

2.7 V

2.7 V

2.7 V

5.0 V "

" "

Q1

Q2

Q1

Q2

80 "

" "

MHz

" " "

tPLH1

Fig. 6 "

" "

100

101

102

103

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

IN (C) IN (B)

OUT

OUT

OUT

" " " "

OUT

IN (C) IN (B)

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

IN (B) IN (C)

IN (B) IN (C)

" " " "

PRE 1 to Q1

PRE 2 to Q2

CLR 1 to  Q1

CLR 2  to  Q2

2.0 "

" "

9.0 "

" "

ns

" " "

tPLH2

Fig. 7 "

" "

104

105

106

107

IN (A) IN (A)

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V E

OUT

OUT

OUT

" " " "

OUT

2.7 V E

2.7 V

2.7 V

2.7 V

2.7 V

IN (A) IN (A)

E

2.7 V

E

2.7 V

" " " "

CLK 1 to  Q1

CLK 2 to  Q2

CLK 1 to Q1

CLK 2 to Q2

" " " "

" " " "

" " " "

tPHL3

Fig. 6 "

" "

108

109

110

111

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

IN (C) IN (B)

OUT

OUT

OUT

" " " "

OUT

IN (C) IN (B)

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V

IN (B) IN (C)

IN (B) IN (C)

" " " "

PRE 1 to  Q1

PRE 2 to  Q2

CLR 1 to Q1

CLR 2 to Q2

" " " "

9.75 "

" "

" " " "

tPHL2

Fig. 7 "

" "

112

113

114

115

IN (A) IN (A)

2.7 V

2.7 V

2.7 V

2.7 V

2.7 V E

OUT

OUT

OUT

" " " "

OUT

2.7 V E

2.7 V

2.7 V

2.7 V

2.7 V

IN (A) IN (A)

E

2.7 V

E

2.7 V

" " " "

CLK 1 to  Q1

CLK 2 to  Q2

CLK 1 to Q1

CLK 2 to Q2

" " " "

9.0 "

" "

" " " "

tSETUP

(L)

Fig. 8 "

" "

116

117

118

119

IN (A) IN (A)

2.7 V IN (D)

IN (D)

2.7 V

E

2.7 V

OUT

OUT

OUT

" " " "

OUT

E

2.7 V

IN (D)

2.7 V

2.7 V IN (D)

IN (A) IN (A)

2.7 V E

2.7 V E

" " " "

Q1

Q2

Q1

Q2

9/ "

" "

tSETUP

(H)

" " "

"

120

121

122

123

IN (A) IN (A)

2.7 V IN (E)

IN (E)

2.7 V

2.7 V E

OUT

OUT

OUT

" " "

"

OUT

2.7 V

E

IN (E)

2.7 V

2.7 V

IN (E)

IN (A)

IN (A)

E

2.7 V

E

2.7 V

" " "

"

Q1

Q2

Q1

Q2

" " "

"