MIL-M-38510-502 Microcircuits, Digital, Bipolar Field Programmable Logic Array Fpla 16 X 48 X 8, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, bipolar, field programmable logic array FPLA microcircuits which employ thin film nichrome resistors WICr as the fusible link or programming element. Three product assurance classes and a choice of case outline/lead material and finish are provided for each type and are reflected in the complete part number.

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MIL-M-38510/502A APPENDIX A

A.3.2  Unprogrammed devices - Circuit B.

A.3.2.1  "AND" (Product) matrix input fuse check.

Terminal conditions:                        VCC  = 5.0 V

CE  = TTL HIGH

a.    Select the product term to be tested by applying a binary address of TTL levels to pins 10 through 13,

15, 16 (F7  through F2) (F7 = LSB, F2 =MSB).

b.    Apply 12.0 V to all input pins (I0  through I15) except for input Ix being tested.

c.    The state of the Ix input fuse will be checked if the truth table below holds.  Vary input Ix while

monitoring pin 18 (F0).

Ix  │ F0

L   │ L

H  │ L

If F0  is HIGH, then fuse is open indicating a failure.

d.    Repeat steps b and c for each input of the selected product term.

e.    Repeat steps a through c for all other product items and input fuse tests. A.3.2.2  "OR" (Sum) matrix fuse check.

Terminal conditions:                        VCC  = 5.0 V

CE  = TTL LOW

a.        Apply TTL levels to pins 4 through 9 (I5  through I0) to select the AND gate to be verified (I0 = LSB and, I5  = MSB).

b.    Apply TTL HIGH level to pins 20 and 22 (I15 and I13). c.    Connect the remaining input pins to 12.0 V.

d.        Sense the voltage on the output pin to be verified.  All unblown fuse links will indicate a high on the output pin.

A.3.2.3  Output polarity fuse check.

Terminal conditions:                        VCC  = 5.0 V

CE  = TTL LOW

a.    Apply TTL HIGH level to pins 4 through 9 (I5 through I0),  21 and 22 (I14  and I13). b.    Connect remaining pins to 12.0 V.

c.    Sense the voltage on the pins of the output buffer to be verified.  All output levels should read TTL

HIGH.

A.3.3  Programmed devices - Circuits A and B.

Program the device according to the program shown in table A-I.

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