MIL-M-38510-502 Microcircuits, Digital, Bipolar Field Programmable Logic Array Fpla 16 X 48 X 8, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, bipolar, field programmable logic array FPLA microcircuits which employ thin film nichrome resistors WICr as the fusible link or programming element. Three product assurance classes and a choice of case outline/lead material and finish are provided for each type and are reflected in the complete part number.

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Test

Symbol

Test conditions 1/

Device types

Limits

Unit

Min

Max

High-level output voltage

VOH

VCC  = 4.5 V; IOH  = -2 mA

02

2.4

V

Low-level output voltage

VOL

VCC  = 5.5 V; IOL  = 9.6 mA

01,02

0.5

V

Input clamp voltage

VIC

VCC  = 4.5 V; IIN  = -18 mA

01,02

-1.2

V

Maximum collector cut-off current

ICEX

VCC  = 5.5 V; VO  = 5.5 V

01

100

µA

High-impedance (off-state)

output high current

IOHZ

VCC  = 5.5 V; VO  = 5.5 V

02

100

µA

High-impedance (off-state)

output low current

IOLZ

VCC  = 5.5 V; VO  = 0.45 V

02

-60

µA

High-level input current

IIH

VCC  = 5.5 V; VIN  = 5.5 V

01,02

50

µA

Low-level input current

IIL

VCC  = 5.5 V; VIN  = 0.45 V

01,02

-1

-250

µA

Short circuit output current

IOS     2/

VCC  = 5.5 V; VOUT  = GND

02

-10

-85

mA

Supply current

ICC

VCC  = 5.5 V; VIN  = 0;

outputs = open

01,02

180

mA

Propagation delay time high-to-low level logic,

input to output

tPHL1

(tIA)

VCC  = 4.5 V and 5.5 V; CL  = 30 pF

(See figure 4)

01,02

80

ns

Propagation delay time

low-to-high level logic, input to output

tPLH1

(tIA)

01,02

80

ns

Propagation delay time

high-to-low level logic, enable to output

tPHL2

(tEC)

01,02

50

ns

Propagation delay time low-to-high level logic,

enable to output

tPLH2

(tCO)

01,02

50

ns