MIL-M-38510-175 Microcircuits, Digital, Cmos, Positive Logic, Flip-Flops And Monostable Multivibrator, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/175C

1.2.3 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:

Outline letter A	Descriptive designator GDFP5-F14 or CDFP6-F14	Terminals 14	Package style Flat pack
C	GDIP1-T14 or CDIP2-T14	14	Dual-in-line
D	GDFP1-F14 or CDFP2-F14	14	Flat pack
E	GDIP1-T16 or CDIP2-T16	16	Dual-in-line
F	GDFP2-F16 or CDFP3-F16	16	Flat pack
N	CDFP4-F16	16	Flat pack
X 1/ 2/	GDFP5-F14 or CDFP6-F14	14	Flat pack, except A dimension
			equals 0.100" (2.54 mm) max
Y 1/ 2/	GDFP1-F14 or CDFP2-F14	14	Flat pack, except A dimension
			equals 0.100" (2.54 mm) max
Z 1/ 2/	GDFP2-F16 or CDFP3-F16	16	Flat pack, except A dimension
			equals 0.100" (2.54 mm) max

1.3 Absolute maximum ratings.

Supply voltage range (VDD - VSS) ...................................................... -0.5 V dc to +18.0 V dc

Input current (each input).................................................................. ±10 mA

Input voltage range ........................................................................... (VSS - 0.5 V) ≤ VI ≤ (VDD + 0.5 V) Storage temperature range (TSTG) ................................................... -65° to +175°C

Maximum power dissipation (PD) ..................................................... 200 mW Lead temperature (soldering, 10 seconds) ...................................... +300°C

Thermal resistance, junction to case (εJC)........................................ See MIL-STD-1835

Junction temperature (TJ) ................................................................ 175°C

1.4 Recommended operating conditions.

Supply voltage range (VDD - VSS) ...................................................... 4.5 V dc to 15.0 V dc

Input low voltage range (VIL)............................................................. VOL = 10% VDD, VOH = 90% VDD

0.0 V to 1.5 V dc @ VDD = 5.0 V dc

0.0 V to 2.0 V dc @ VDD = 10.0 V dc

0.0 V to 4.0 V dc @ VDD = 15.0 V dc

Input high voltage range (VIH) ........................................................... VOL = 10% VDD, VOH = 90% VDD

3.5 V to 5.0 V dc @ VDD = 5.0 V dc

8.0 V to 10.0 V dc @ VDD = 10.0 V dc

11.0 V to 15.0 V dc @ VDD = 15.0 V dc

Operating temperature range (TA) .................................................... -55°C to +125°C Minimum value of external resistance (Rx) ...................................... 5 kν

Maximum value of external capacitance (Cx) ................................... 100 μF

1/ As an exception to the nickel plate and undercoating paragraph of MIL-PRF-38535, appendix A, for case outlines X, Y, and Z only, the leads of bottom brazed ceramic packages (i.e., configuration 2 of case outlines A, D, and F) may have electroless nickel undercoating which is 50 to 200 microinches (1.27 to 5.08 μm) thick provided the lead finish is hot solder dip (i.e., finish letter A) and provided that, after any lead forming, an additional hot solder dip coating is applied which extends from the outer tip of the lead to no more than 0.015 inch (0.38 mm) from the package edge.

2/ For bottom or side brazed packages, case outlines X, Y, and Z only, the S1 dimension may go to .000 inch

(.00 mm) minimum.