MIL-M-38510/654A
Device type 01
Inputs |
Outputs |
||
D |
EN |
Q |
Q |
L |
H |
L |
H |
H |
H |
H |
L |
X |
L |
Qo |
Qo |
H = High level voltage
L = Low level voltage
X = Don't care
Q0 (Q0) = The level of Q (Q) before the transition of EN
Device type 02
Inputs |
Ouput of addressed latch |
Each other output |
Function |
|
CLR |
EN |
|||
H |
L |
D |
Qio |
Addressable latch |
H |
H |
Qio |
Qio |
Memory |
L |
L |
D |
L |
8-line demultiplexer |
L |
H |
L |
L |
Reset |
H = High level voltage
L = Low level voltage
D = The level at the data input
Qio = The level of Q (i = 0, 1,…,7) as appropriate before
the indicated steady-state input conditions were established
Latch selection table, device type 02
Select inputs |
Latch addressed |
||
A2 |
A1 |
A0 |
|
L |
L |
L |
0 |
L |
L |
H |
1 |
L |
H |
L |
2 |
L |
H |
H |
3 |
H |
L |
L |
4 |
H |
L |
H |
5 |
H |
H |
L |
6 |
H |
H |
H |
7 |
FIGURE 2. Truth tables.
22
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