MIL-M-38510-654 Microcircuits, Digital, High Speed, Cmos Latches, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, high speed CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/654A

4. VERIFICATION

4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein.

4.2 Screening. Screening shall be in accordance with MIL-PRF-38535 and shall be conducted on all devices prior to qualification and conformance inspection. The following additional criteria shall apply:

a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document control by the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

b. Delete the sequence specified as interim (pre-burn-in) electrical parameters through interim (post-burn-in)

electrical parameters of table IA of MIL-PRF-38535 and substitute lines 1 through 7 of table II herein.

c. Burn-in (method 1015 of MIL-STD-883).

(1) Unless otherwise specified in the manufacturers QM plan for static tests (test condition A), ambient temperature (TA) shall be +125°C minimum. Test duration for each static test shall be

24 hours minimum for class S devices and in accordance with table I of method 1015 for class

B devices.

i. For static burn-in I, all inputs shall be connected to GND. Outputs shall be open or connected to VCC/2. Resistors are optional on outputs if open. Resistors are required on inputs and on outputs connected to VCC/2. R = 680n to 47 kn.

ii. For static burn-in II, all inputs shall be connected through a resistor to VCC. Output shall be open or connected to VCC/2. Resistors are optional on outputs if open. Resistors are required on inputs and on outputs connected to VCC/2. R = 680n to 47 kn.

(2) Unless otherwise specified in the manufacturers QM plan for dynamic test (test condition D), ambient temperature shall be +125°C minimum. Test duration shall be in accordance with table I of method 1015.

i. For dynamic burn-in, all inputs shall be connected through the resistors in parallel to a common CP. Outputs shall be connected to VCC/2 ±0.5 V through the resistors.

R = 1 kn ±5% for outputs for device types 01 and 02. R = 680n ±5% for outputs for

device types 03-06 and 53. R = 1 kn to 47 kn for inputs for device types 01 and 02, and

R = 680n to 47 kn for inputs of device types 03-06 and 53.

ii. CP = 25 kHz to 1 MHz square wave; duty cycle = 50% ±15%; VIH = 4.5 V to VCC; VIL = 0.0 V ±0.5 V; transition time ≤ 0.5 µs.

iii. For device types 01-06, VCC = 6.0 V ±0.5 V. For device type 53, VCC = 5.5 V ±0.5 V.

d. Interim and final electrical test parameters shall be as specified in table II.

e. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements may, at the manufacturer's option, be performed separately or included in the final electrical parameter requirements.