MIL-M-38510-206 Microcircuit, Digital, 4096 Bit Schottky, Bipolar, Programmable Read-Only Memory PromThis specification covers the detail requirements for monolithic silicon, programmable read-only memory PROM microcircuits which employ thin film nichrome NiCr resistors, tungsten W or titanium tungsten TiW as the fusible link or programming element. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. A special test requirement is included in this specification to screen against devices which may contain excess moisture in the package materials or internal atmosphere see freeze-out test of 4.2d. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/206D

h. To verify programming, lower VCCP to VCC. Connect a 10 kn resistor between each output and VCC. Apply

VIL to CE 1 inputs. The programmed outputs should remain in the high state and the unprogrammed outputs should go to the low level.

i. If any bit does not verify as programmed, it shall be considered a programming reject.

4.9 Programming procedures for circuit C. The programming characteristics in table IVC and the following procedures shall be used for programming the device:

a. Connect the device in the electrical configuration for programming. The waveforms on the figure 6C and the programming characteristics of table IVC shall apply to these procedures.

b. Terminate all device outputs with a 10 kn resistor to VCC.

c. Address the PROM with the binary address of the selected word to be programmed. Raise VCC to VCCP.

d. After a tD delay (10µs), apply only one VOUT pulse to the output to be programmed. Program one output at a time.

e. After a tD delay (10µs), pulse both CE inputs to "0" for a duration of tP.

f. After a tD delay (10µs), remove the VOUT pulse from the programmed output. Programming a fuse will cause the output to go to a high-level logic in the verify mode.

g. Other bits in the same word may be programmed sequentially while the VCC input is at the VCCP level by applying VOUT pulses to each output to be programmed allowing a delay of tD between pulses as shown on figure 6C.

h. Repeat steps b through g for all other bits to be programmed.

i. To verify programming, after tD (10 µs) delay, lower VCC to VCCH and apply a logic "0" level to both CE inputs. The programmed output should remain in the "1" state. Again, lower VCC to VCCL and verify that the programmed output remains in the "1" state.

j. If any bit does not veify as programmed it shall be considered a programming reject.

4.10 Programming procedure for circuit D. The programming characteristics in table IVD and the following procedures shall be used for programming the device.

a. Connect the device in the electrical configuration for programming. The waveforms on figure 6D and the programming characteristics in table IVD shall apply to these procedures.

b. Address the PROM with the binary address of the selected word to be programmed. Address inputs are

TTL compatible.

c. Disable the chip by applying VIH to the CE inputs. The CE inputs are TTL compatible.

d. After a delay of tD, apply only one VOUT pulse with a duration of tp to the ouput selected for programming.

The other outputs may be left open or tied to VIH. The outputs shall be programmed one output at a time.

Note that the PROM is supplied with fuses generating a high-level logic output. Programming a fuse will

cause the output to go to a low-level logic in the verify mode.

e. Other bits in the same word may be programmed sequentially by applying VOUT pulses to each output to be programmed.

f. Repeat steps b through e for all other bits to be programmed.