MIL-M-38510-2 Microcircuits, Digital, Ttl, Flip-Flops, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, bistable logic microcircuits. Three product assurance classes and a choice of case outlines/lead finish are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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Subgroup

Symbol

MIL-STD-

883 method

Case A, B D

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Meas. terminal

Test limits

Case C

3

2

1

14

13

12

11

10

9

8

7

6

5

4

Test No.

Clock

1

D1

Clear

1

VCC

Clear

2

D2

Clock

2

Preset

2

Q2

Q 2 

GND

Q 1 

Q1

Preset

1

Min

Max

Unit

9

TC = 25°C

FMAX

(Fig. 11)

82

IN

E

5.0 V

5.0 V

GND

OUT

5.0 V

Q1

10

MHz

"

"

83

IN

E

5.0 V

"

"

OUT

5.0 V

Q 1 

"

"

"

"

"

84

"

5.0 V

E

IN

5.0 V

OUT

"

Q2

"

"

"

"

"

85

"

5.0 V

E

IN

5.0 V

OUT

"

Q 2 

"

"

"

tPLH

3003

((Fig. 10)

86

IN

"

"

OUT

IN

Clear 1

to  Q 1 

5

25

ns

"

"

"

87

IN

"

"

OUT

IN

Preset 1

to Q1

"

"

"

"

"

"

88

"

IN

IN

OUT

"

Clear 2

to  Q 2 

"

"

"

"

"

"

89

"

IN

IN

OUT

"

Preset 2

to Q2

"

"

"

"

tPHL

"

90

IN

"

"

OUT

IN

Clear 1

to Q1

"

33

"

"

"

"

91

IN

"

"

OUT

IN

Preset 1

to  Q 1 

"

36

"

"

"

"

92

"

IN

IN

OUT

"

Clear 2

to  Q 2 

"

36

"

"

"

"

93

"

IN

IN

OUT

"

Preset 2

to Q2

"

33

"

"

tPLH

3003  5/

(Fig. 11)

94

IN

IN (A)

B

"

"

OUT

5.0 V

Clock 1

to Q1

5

25

ns

"

"

(Fig. 12)

95

IN

IN (A)

5.0 V

"

"

OUT

B

Clock 1

to  Q 1 

"

"

"

"

"

(Fig. 11)

96

"

B

IN (A)

IN

5.0 V

OUT

"

Clock 2

to Q2

"

"

"

"

"

(Fig. 12)

97

"

5.0 V

IN (A)

IN

B

OUT

"

Clock 2

to  Q 2 

"

"

"

"

tPHL

(Fig. 12)

98

IN

IN (B)

5.0 V

"

"

OUT

B

Clock 1

to Q1

"

33

"

"

"

(Fig. 11)

99

IN

IN (B)

B

"

"

OUT

5.0 V

Clock 1

to  Q 1 

"

"

"

"

"

(Fig. 12)

100

"

5.0 V

IN (B)

IN

B

OUT

"

Clock 2

to Q2

"

"

"

"

"

(Fig. 11)

101

"

B

IN (B)

IN

5.0 V

OUT

"

Clock 2

to  Q 2 

"

"

"