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MIL-M-38510-2 Microcircuits, Digital, Ttl, Flip-Flops, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, bistable logic microcircuits. Three product assurance classes and a choice of case outlines/lead finish are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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See notes at end of device type 05.


TABLE III.  Group A inspection for device type 05. 1/ - Continued.


Subgroup

Symbol

MIL-

STD-883 method

Case A, B, D

1

2

3

4

5

6

7

8

9

10

11

12

13

14


Meas. terminal

Test limits

Case C

Test No.

Clock 1

D1

Clear 1

VCC

Clear 2

D2

Clock 2

Preset 2

Q2

Q 2 

GND

Q 1 

Q1

Preset 1

Min

Max

Unit

10

TC = 125°C

tPLH2

3003 5/

(Fig 11)

117

IN

IN (A)

B

"

"

OUT

5.0 V

Clock 1

to Q1

5

39

ns

"

(Fig 12)

118

IN

IN (A)

5.0 V

"

"

OUT

B

Clock 1

to  Q 1 

"

"

"

"

"

(Fig 11)

119

"

B

IN (A)

IN

5.0 V

OUT

"

Clock 2

to Q2

"

"

"

"

"

(Fig 12)

120

"

5.0 V

IN (A)

IN

B

OUT

"

Clock 2

to  Q 2 

"

"

"

"

tPHL2

(Fig 12)

121

IN

IN (B)

5.0 V

"

"

OUT

B

Clock 1

to Q1

"

40

"

"

"

(Fig 11)

122

IN

IN (B)

B

"

"

OUT

5.0 V

Clock 1

to  Q 1 

"

"

"

"

"

(Fig 12)

123

"

5.0 V

IN (B)

IN

B

OUT

"

Clock 2

to Q2

"

"

"

"

"

(Fig 11)

124

"

B

IN (B)

IN

5.0 V

OUT

"

Clock 2

to  Q 2 

"

"

"

11

Same tests, terminal conditions and limits as for subgroup 10, except TC = -55°C.


NOTES:

A = Normal clock pulse.

B = Momentary GND, then 4.5 V. E = Input D connected to  Q . 

J = Input pulse, tp � 100 ns, PRR = 1 MHz, VOL  = 0 V, VOH = 4.5 V.


1/ Terminal conditions (pins not designated may be H � 2.0 V, or L ≤ 0.8 V, or open).

2/ Input voltages shown are:  A = 2.0 V minimum and B = 0.8 V maximum.

3/ Output voltages shall be either: (a) H = 2.4 V, minimum and L = 0.4 V, maximum when using a high speed checker double comparator; or (b) H � 1.5 V and L < 1.5 V when using a high speed checker single comparator.

4/ Tests shall be performed in sequence.

5/ Tests shall be performed for both D input pulses (A and B).

6 FMAX, minimum limit specified is the frequency of the input pulse.  The output frequency shall be one-half of the input frequency.

7/ CKT C limits are -0.7 to -4.8 mA for these tests.




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