MIL-M-38510-757 Microcircuits, Digital, Advanced Cmos, Buffer Gates, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, advanced CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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Test and MIL-STD-883 test method

Symbol

Test Conditions  1/

-55°C σ TC  σ +125°C

+3.0 V σ VCC  σ +5.5 V

unless otherwise specified

Device type

2/

VCC

Group A

subgroups

Limits  1/

Unit

Min

Max

Input capacitance

3012

CIN

See 4.4.1c

TC  = +25°C

All

0.0 V

4

10

pF

Output capacitance

3012

COUT

See 4.4.1c

TC  = +25°C

03-11

5.5 V

4

15

pF

Power dissipation capacitance

CPD

10/

See 4.4.1c

TC  = +25°C

01, 02

5.0 V

4

50

pF

03-11

65

Low level

ground  bounce noise

VGBL

11/  12/

VLD  = 2.5 V

IOL  = +24 mA, see figure 3

All

4.5 V

4

0

2000

mV

High level

ground  bounce noise

VGBH

11/  12/

VLD  = 2.5 V IOH  = -24 mA, see figure 3

All

4.5 V

4

0

2000

mV

Latch-up input/ output over- voltage

ICC

(O/V1)

13/

tw 100 ∝s tcool  tw

5 ∝s σ tr  σ 5 ms

5 ∝s σ tf  σ 5 ms Vtest  = 6.0 V VCCQ  = 5.5 V Vover  = 10.5 V

All

5.5 V

2

200

mA

Latch-up input/ output positive over-current

ICC

(O/I1+)

13/

tw 100 ∝s tcool  tw

5 ∝s σ tr  σ 5 ms

5 ∝s σ tf  σ 5 ms Vtest  = 6.0 V VCCQ  = 5.5 V

Itrigger = +120 mA

All

5.5 V

2

200

mA

Latch-up input/ output negative over-current

ICC

(O/I1-)

13/

tw 100 ∝s tcool  tw

5 ∝s σ tr  σ 5 ms

5 ∝s σ tf  σ 5 ms Vtest  = 6.0 V VCCQ  = 5.5 V Itrigger = -120 mA

All

5.5 V

2

200

mA

Latch-up supply over-voltage

ICC

(O/V2)

13/

tw 100 ∝s tcool  tw

5 ∝s σ tr  σ 5 ms

5 ∝s σ tf  σ 5 ms Vtest  = 6.0 V VCCQ  = 5.5 V Vover  = 9.0 V

All

5.5 V

2

100

mA