MIL-M-38510-507 Microcircuits, Memory, Digital, CMOS Ultraviolet Erasable Programmable Array Logic, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element. Two product assurance classes B and S and a choice of case outlines and lead finishes are provided and are reflected in the complete part or identifying number PIN. For this product, the requirements of MIL-M-38510 have been

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22

MIL-M-38510/507B

START VCC = 5.0 V

VPP = 12.5 V

ADDRESS FIRST LOCATION

PLACE DATA TO BE PROGRAMMED ON THE I/O PINS

X = 0

PROGRAM ONE PULSE OF 0.4 ms

X = X + 1

X = 5

YES

INCREMENT ADDRESS

FAIL

NO VERIFY ONE WORD

PASS PROGRAM ONE PULSE OF

((SEE NOTE) 0.4 X) ms

X = 5

NO LAST ADDRESS

YES VERIFY ALL WORDS AT VCCP = 5.5 V AND 4.5 V

PASS GOOD DEVICE

YES

FAIL

DEVICE FAIL FAIL

VERIFY BYTE

PASS

DEVICE FAIL

VPP = 0.0 V

VCC = 0.0 V STOP

NOTE: This value is "41" for programming the NORMAL array, PHANTOM array TOP TEST, BOTTOM TEST and

OUTPUT ENABLE PRODUCT TERMS. The value is "8" when programming ARCHITECTURE BITS.

FIGURE 6. Programming flowchart.