MIL-M-38510-301 Microcircuits, Digital, Bipolar Low-Power Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, flip-flops, bistable logic gate microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/301F

NOTES:

1.  Clear or preset inputs dominate regardless of the state of clock or J-K  inputs.

2.  Clear or preset input has the following characteristics: Vgen  = 3 V, t1  � 15 ns, t0  � 6 ns, tp(clear) = tp(preset) = 30 ns, PRR � 1 MHz, and Zout   ≈  50n.

3.  CL  = 50 pF ±10% (including jig and probe capacitance).

4.  RL  = 2 kn ±5%.

5.  All diodes are 1N3064, or equivalent.

6.  When testing clear to output switching, preset input shall have a logical "1" voltage applied.  When testing preset to output switching, clear input shall have a logical "1" voltage applied.  (see table III).

7.  Clock input pulse characteristics: tp(clock) � 25 ns, Vgen = 3 V, PRR � 1 MHz.

FIGURE 17,  Clear and preset switching test circuit and waveforms for device type 09.

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