MIL-M-38510-301 Microcircuits, Digital, Bipolar Low-Power Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, flip-flops, bistable logic gate microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - 35 - 36 - 37 - 38 - 39 - 40 - 41 - 42 - 43 - 44 - 45 - 46 - 47 - 48 - 49 - 50 - 51 - 52 - 53 - 54 - 55 - 56 - 57 - 58 - 59 - 60 - 61 - 62 - 63 - 64 - 65 - 66 - 67

MIL-M-38510/301F

NOTES:

1. Clock input pulse has the following characteristics: Vgen = 3 V, t1 � 15 ns, t0 � 6 ns, tp (clock) = 30 ns, and PRR � 1

MHz. When testing fMAX, PRR = see table III, tp (clock) � 30 ns, and t0 = t1 � 6ns.

2. D input has the following characteristics: Vgen = 3 V, t1 � 15 ns, t0 � 6 ns, tsetup = 20 ns, thold = 5 ns, tp = 25 ns, and

PRR is 50% of the clock PRR. For fMAX, t0 = t1 � 6ns.

3. All diodes are 1N3064, or equivalent.

4. CL = 50 pF ±10% (including jig and probe capacitance).

5. RL = 2 kn ±5%.

6. Q output applies to device type 07 only.

FIGURE 14. Synchronous switching test circuit (high-level data) for device types 06 and 07.