MIL-M-38510-301 Microcircuits, Digital, Bipolar Low-Power Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, flip-flops, bistable logic gate microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/301F

NOTES:

1. Clock input pulse has the following characteristics: Vgen = 3 V, t1 � 15 ns, t0 � 6 ns, tp (clock) = 30 ns, PRR � 1 MHz.

When testing fMAX, PRR = see table III, tp (clock) � 30 ns, and t0 = t1 � 6 ns.

2. D input has the following characteristics: Vgen = 3 V, t1 � 15 ns, t0 � 6 ns, tsetup = 20 ns, thold = 5 ns, tp = 25 ns, and

PRR is 50% of the clock PRR. For fMAX, t0 = t1 � 6 ns.

3. All diodes are 1N3064, or equivalent.

4. CL = 50 pF ±10% (including jig and probe capacitance).

5. RL = 2 kn ±5%.

FIGURE 7. Synchronous switching test circuit (high-level data) for device type 02.