MIL-M-38510/301F
NOTES:
1. Clock input characteristics for tPLH, tPHL (clock to output), Vgen = 3 V, t0 � 6 ns, t1 � 15 ns, tp (clock) = 25 ns, and PRR �
1 MHz. When testing fMAX, the clock input characteristics are Vgen = 3 V, t0 = t1 � 6ns, tp (clock) � 25 ns, and PRR =
see table III,.
2. All diodes are 1N3064, or equivalent.
3. CL = 50 pF ±10% (including jig and probe capacitance).
4. RL = 2 kn ±5%.
FIGURE 16. Synchronous switching test circuit for device type 09.
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