MIL-M-38510-289 Microcircuits, Digital, Cmos 4096 Bit Static Random Access Memory Ram Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, CMOS static, 4096-bit random access memories. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/289A

A.2.5 Pattern 5.

Diagonal GALRESH (with row column ping pong read GG II). This pattern will test all bits in the array for writing interaction for switching performance.

a. Initialize the memory by writing a field of 0's.

b. Perform the following read write sequence moving the test bit along the diagonal of the memory; and reading only the row and column of the test bit in ping pong fashion:

RO = read "0" WI = Write "1" etc.

BACKGROUND BIT TEST BIT

c. Reinitialize the memory by writing a field of 1's.

d. Perform the following read write sequence moving the test bit along the diagonal of the memory; and reading only the row and column of the test bit in ping pong fashion:

BACKGROUND BIT TEST BIT

Custodians: Army - CR Navy - EC

Air Force - 11

DLA - CC

Review activities: Army - MI, SM

Navy - AS, CG, MC, SH, TD Air Force - 03, 19, 99

Preparing activity: DLA - CC

(Project 5962-2005-052)

NOTE: The activities listed above were interested in this document as of the date of this document. Since organizations and responsibilities can change, you should verify the currency of the information above using the ASSIST Online database at https://assist.daps.dla.mi l .