1/ See appendix for description of algorithms.
MIL-M-38510/289A
2/ An input preconditioning logic sequence shall be applied that results in a logic "1"at the output to be measured. Logic input levels during measurement shall be: VIL = 0.8 V; VIH = 2.0 V. Forcing current IOL shall be -4.0 mA.
3/ An input preconditioning logic sequence shall be applied that results in a logic "0" at the output to be measured. Logic input levels during measurement shall be:
Types 02, 04 |
VIL |
VIH |
IOL |
0.8 V |
2.0 V |
8.0 mA |
4/ ICC = 110 mA for device type 02, 140 mA for device type 04.
5/ ISB = 10 mA for device type 02; 30 mA for device type 04. The device manufacturer, may at his option, do either test or both tests.
6/ See 4.4.1c.
7/ VIL = GND, VIH = 6.0 V, pause time = 250 ms/loop max, CS = high, only performed once at 125°C, and
VCC = 0.7 V min.
8/ VIL = 0.8 V and VIH = 2.0 V.
9/ Algorithm has 60 ns where chip is deselected between the write.
10/ VIL = GND, VIH = 3.0 V, and all address setup times are at a minimum.
11/ VIL = GND, VIH = 3.0 V, and all write pulse timing are at minimums.
12/ VIL = GND, VIH = 3.0 V, and all address ending timing are at minimums.
13/ VIL = GND, VIH = 3.0 V, and tAVQV measured at minimum timing.
14/ VIL = GND, VIH = 3.0 V, tELQV1 and tELQV2 are measured at minimum timing.
15/ VIL = 0.0 V, VIH = 3.0 V, and all parameters are measured at minimum timing.
16/ tAVQV = 35 ns for device type 02; 55 ns for device type 04.
17/ tELQV1 and tELQV2 = 35 ns for device type 02; 65 ns for device type 04.
18/ tAVAV = 35 ns for device type 02; 55 ns for device type 04.
19/ tWLWH = 30 ns for device type 02; 40 ns for device type 04.
20/ tWHAX = 5 ns for device type 02; 5 ns for device type 04.
21/ tDVWH = 20 ns for device type 02; 20 ns for device type 04.
22/ tELWH = 30 ns for device type 02; 50 ns for device type 04.
23/ tAVWH = 30 ns for device type 02; 50 ns for device type 04.
24/ tAVWL = 30 ns for device type 02; 50 ns for device type 04.
25/ tAVQX is 0 ns for device type 02; 5 ns for device type 04.
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