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MIL-M-38510-22 Microcircuits, Digital, Bipolar, High-Speed Ttl, Flip-Flops, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, high speed TTL, bistable logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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TABLE III.  Group A inspection for device type 04 - Continued.  1/


Subgroup

Symbol

MIL- STD-

883 method

Cases

E,F

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Measured terminal

Limits

Unit

Test no.

Clock 1

Preset

1

Clear 1

J1

vCC

Clock 2

Preset

2

Clear 2

J2

Q2

Q2

K2

GND

Q1

Q1

K1

Min

Max

10

TC=+125°C

fMAX

5/

(Fig. 11)

100

101

102

103

IN IN

5.0 v

5.0 v

5.0 v

5.0 v

2.4 v

2.4 v

5.0 v

" " "



IN IN


5.0 v

5.0 v


5.0 v

5.0 v


2.4 v

2.4 v



OUT


OUT


2.4 v

2.4 v

GND "

" "


OUT

2.4 v

2.4 v

Q1

Q1

Q2

Q2

20 "

" "

MHz

" " "

tPLH1

3003 (Fig. 10)

104

105

106

107

2.4 v

2.4 v


IN

IN

2.4 v

2.4 v

" " " "



2.4 v

2.4 v



IN



IN



2.4 v

2.4 v



OUT



OUT



2.4 v

2.4 v

" " " "

OUT


OUT

2.4 v

2.4 v

Clear 1 to Q1

Preset 1 to Q1

Clear 2 to Q2

Preset 2 to Q2

2 " " "

20 "

" "

ns

" " "

tPHL1

108

109

110

111

2.4 v

2.4 v


IN

IN

2.4 v

2.4 v

" " "

"


2.4 v

2.4 v



IN


IN


2.4 v

2.4 v



OUT


OUT


2.4 v

2.4 v

" " "

"


OUT

OUT

2.4 v

2.4 v

Clear 1 to Q1

Preset 1 to Q1

Clear 2 to Q2

Preset 2 to Q2

" " "

"

32 "

" "

" " "

"

tPLH2

3003 (Fig. 11)

"

" " " " "

112

113

114

115

IN IN

5.0 v

5.0 v

5.0 v

5.0 v

2.4 v

2.4 v

" "

"

"


IN IN


5.0 v

5.0 v


5.0 v

5.0 v


2.4 v

2.4 v



OUT


OUT


2.4 v

2.4 v

" "

"

"


OUT

OUT

2.4 v

2.4 v

Clock 1 to Q1

Clock 1 to Q1

Clock 2 to Q2

Clock 2 to Q2

" "

"

"

28 "

"

"

" "

"

"

tPHL2

116

117

118

119

IN IN

5.0 v

5.0 v

5.0 v

5.0 v

2.4 v

2.4 v

" "

" "



IN IN


5.0 v

5.0 v


5.0 v

5.0 v


2.4 v

2.4 v



OUT


OUT


2.4 v

2.4 v

" "

" "


OUT

OUT

2.4 v

2.4 v

Clock 1 to Q1

Clock 1 to Q1

Clock 2 to Q2

Clock 2 to Q2

" "

" "

36 "

" "

" "

" "

11

Same tests, terminal conditions, and limits as for subgroup 10, except TC= -55°C.


A =  Normal clock pulse.

B =  Momentary GND, then 4.5 v. E =  Momentary GND, then 2.4 v. F =  Momentary GND, then 5.5 v.

** = Test time limit s 100 ns.


1/    Terminal conditions (pins not designated may be H � 2.0 v, or L s 0.8 v, or open).

2/    Tests shall be performed in sequence.

3/    Input voltages shown are:  A = 2.0 v minimum and B = 0.8 v maximum.

4/    Output voltages shall be either:  a.  H = 2.4 v, minimum and L = 0.4 v, maximum when using a high speed checker double comparator; or b.

H � 1.5 v and L s 1.5 v when using a high speed checker single comparator.

5/    fMAX, minimum limit specified is the frequency of the input pulse.  The output frequency shall be one-half of the input frequency.




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