MIL-M-38510/220
TABLE I. Electrical performance characteristics - Continued.
Test |
Symbol |
Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified |
0evice types |
Limits |
Unit |
||
Min |
Max |
||||||
Maximum clock frequency 2/ |
fMAX |
CL = 50 pF RL = 2800 |
Figure 4 |
01 |
20 |
MHz |
|
Figure 6 |
02 |
20 |
|||||
Figure 8 |
03 |
28 |
|||||
Figure 11 |
04 |
20 |
|||||
Figure 13 |
05 |
30 |
|||||
Figure 15 |
06 |
30 |
|||||
Propagation delay to a logical 1 (clear or preset to output) |
tPLH1 |
CL = 50 pF RL = 2800 |
Figure 3 |
01 |
2 |
20 |
ns |
Figure 5 |
02 |
" |
20 |
||||
Figure 7 |
03 |
" |
27 |
||||
Figure 10 |
04 |
" |
20 |
||||
Figure 12 |
05 |
" |
28 |
||||
Figure 14 |
06 |
" |
18 |
||||
Propagation delay to a logical 0 (clear or preset to output) |
tPHL1 |
CL = 50 pF RL = 2800 |
Figure 3 |
01 |
2 |
31 |
ns |
Figure 5 |
02 |
" |
31 |
||||
Figure 7 |
03 |
" |
38 |
||||
Figure 10 |
04 |
" |
32 |
||||
Figure 12 |
05 |
" |
28 |
||||
Figure 14 |
06 |
" |
46 |
||||
Propagation delay to a logical 1 (clock to output) |
tPLH2 |
CL = 50 pF RL = 2800 |
Figure 4 |
01 |
2 |
28 |
ns |
Figure 6 |
02 |
" |
35 |
||||
Figure 8 and 9 |
03 |
" |
22 |
||||
Figure 11 |
04 |
" |
28 |
||||
Figure 13 |
05 |
" |
23 |
||||
Figure 15 |
06 |
" |
23 |
||||
Propagation delay to a logical 0 (clock to output) |
tPHL2 |
CL = 50 pF RL = 2800 |
Figure 4 |
01 |
2 |
37 |
ns |
Figure 6 |
02 |
" |
42 |
||||
Figure 8 and 9 |
03 |
" |
28 |
||||
Figure 11 |
04 |
" |
36 |
||||
Figure 13 |
05 |
" |
28 |
||||
Figure 15 |
06 |
" |
28 |
||||
1/ Not more than one output should be shorted at a time.
2/ fMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall be one- half of the input frequency.
5
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