MIL-M-38510-125 Microcircuits, Linear, Sample And Hold Circuits, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, sample and hold circuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4

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Test

Symbol

Conditions

-55°C s TA s +125°C

±VCC = ±15 V, see figure 3 and 3.5

unless otherwise specified

Device type

Limits

Unit

Min

Max

Power supply rejection

ratio

+PSRR

+VCC = +12 V to +18 V,

-VCC = -18 V, VIN = 0 V

01,02

80

dB

-PSRR

+VCC = +18 V, VIN = 0 V

-VCC = -12 V to -18 V

80

Feedthrough rejection   3/

ratio

FRR

VIN = ±11.5 V, hold mode, see figure 4,

TA = +25°C

01,02

86

dB

VIN = ±11.5 V, hold mode, see figure 4,

-55°C s TA s +125°C

80

FRRac

VIN = 20 VPP at 1 kHz, TA = +25°C

hold mode, see figure 5

86

Series charge          4/

resistance

RSC

VIN = 0 V to 0.4 V;

measure current change to ground at

HOLD CAPACITOR terminal pin

01,02

75

400

n

Output impedance

zO

VHOLD CAP. = VHC = 0 V, hold mode, see figure 6,

IO = ±1 mA

01,02

2

n

"Hold" step voltage        5/

VHS

VLOGIC = 4 V, tr s 50 ns, see figure 7,

VOUT = ±11.5 V, TA = +25°C

01,02

-2

2

mV

VLOGIC = 4 V, tr s 50 ns, see figure 7,

VOUT = ±11.5 V, -55°C s TA s +125°C

-5

5

Supply current

ICC

TA = -55°C

01

1

6.5

mA

02

1

7.0

+25°C s TA s +125°C

01

1

5.5

02

1

6.0

Logic input current (high)

IIH

VLOGIC = 5.5 V, +VCC = 8.5 V,

-VCC = -21.5 V

01,02

0

10

µA

Logic input current (low)

IIL

VLOGIC = 0 V, +VCC = 21.5 V,

-VCC = -8.5 V

01,02

-1

1

µA