MIL-M-38510/655A
Device type 07
Enable G |
Direction control DIR |
Operation |
L |
L |
B data to A bus |
L |
H |
A data to B bus |
H |
x |
Isolation |
H = High level voltage L = Low level voltage x = Irrelevant
Device type 08
Inputs |
Data I/O * |
Operation or function |
||||||
G |
DIR |
CAB |
CBA |
SAB |
SBA |
A1 thru A8 |
B1 thru B8 |
|
H |
x |
H or L |
H or L |
x |
x |
Input |
Input |
Isolation |
H |
x |
t |
t |
x |
x |
Store A and B data |
||
L |
L |
x |
x |
x |
L |
Output |
Input |
Real time B data to A bus |
L |
L |
x |
H or L |
x |
H |
Store B data to A bus |
||
L |
H |
x |
x |
L |
x |
Input |
Output |
Real time A data to B bus |
L |
H |
H or L |
x |
H |
x |
Store A data to B bus |
||
x |
x |
t |
x |
x |
x |
Input |
Not specified |
Store A, B undefined |
x |
x |
x |
t |
x |
x |
Not specified |
Input |
Store B, A undefined |
H = High level L = Low level x = Irrelevant t = Low-to-high level transition
* = The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input
function are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
Device type 09
Inputs |
Data I/O * |
Operation or function |
||||||
G |
DIR |
CAB |
CBA |
SAB |
SBA |
A1 thru A8 |
B1 thru B8 |
|
H |
x |
H or L |
H or L |
x |
x |
Input |
Input |
Isolation |
H |
x |
t |
t |
x |
x |
Store A and B data |
||
L |
L |
x |
x |
x |
L |
Output |
Input |
Real time B data to A bus |
L |
L |
x |
H or L |
x |
H |
Store B data to A bus |
||
L |
H |
x |
x |
L |
x |
Input |
Output |
Real time A data to B bus |
L |
H |
H or L |
x |
H |
x |
Store A and B bus |
||
x |
x |
t |
x |
x |
x |
Input |
Not specified |
Store A, B undefined |
x |
x |
x |
t |
x |
x |
Not specified |
Input |
Store B, A undefined |
H = High level L = Low level x = Irrelevant t = Low-to-high level transition
* = The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input
function are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
FIGURE 2. Truth tables - Continued.
21
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