MIL-M-38510/207E
TABLE III. Group A inspection - Continued.
1/ For programmed devices, select an appropriate address to acquire the desired output state, VIL = 0.8 V, VIH = 2.0 V.
2/ For unprogrammed devices, apply 11.0 V on pins 10 ( A0 ) and 14 ( A4 ) for circuit A devices.
3/ For unprogrammed 02 devices ( VOL test ), apply 0 V on pins 10 ( A0 ) through 14 ( A4 ) for circuit G.
4/ For unprogrammed devices, apply 12.0 V on pin 14 ( A4 ) for circuit B devices.
5/ This test may, at the manufacturer's option, be performed with VIH = 5.5 V (pin 15) and test limit of
50 µA maximum.
6/ The functional tests shall verify that no fuses are blown for unprogrammed devices or that the truth table specified in the altered item drawing exists for programmed devices (see table II and 3.3.2.2).
All bits shall be tested. Terminal conditions shall be as follows:
a. Inputs: H = 3.0 V, L = 0.0 V.
b. Outputs: Output voltage shall be: H � 1.0 V and L < 1.0 V.
c. The functional tests shall be performed with VCC = 4.5 V and VCC = 5.5 V.
7/ The outputs are loaded per figure 4.
8/ GALPAT (PROGRAMMED PROM).
This program will test all bits in the array, the addressing and interaction between bits for ac performance tPHL1 and tPLH1 . Each bit in the pattern is fixed by being programmed with a "H" and "L".
Description:
Step 1. Word 0 is read. Step 2. Word 1 is read. Step 3. Word 0 is read Step 4. Word 2 is read. Step 5. Word 0 is read.
Step 6. The reading procedure continues back and forth between word 0 and the next higher numbered word until word 255 is reached, then increments to the next word and reads back and forth as in step 1 through step 6 and shall include all words.
2
Step 7. Pass execution time = ( n
+ n ) x cycle time. N = 256.
Step 8. The GALPAT tests shall be performed with VCC = 4.5 V and 5.5 V.
9/
Device |
tPHL1 |
tPLH1 |
tPHL2 |
tPLH2 |
01, 02 |
80 ns |
80 ns |
50 ns |
50 ns |
03, 04 |
35 ns |
35 ns |
25 ns |
25 ns |
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