MIL-M-38510-207 Microcircuit, Digital, 256-Bit, Schottky, Bipolar, Programmable Read-Only Memory Prom, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, PROM microcircuits which employ thin film nichrome NiCr resistors, tungsten W, titanium tungsten TiW, or zapped vertical emitter ZVE as the fusible link or programming element. Two product assurance classes and a choice of case outlines and lead material and finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - 35 - 36

Test

Symbol

Conditions  1/

-55°C ≤ TC ≤ +125°C

unless other wise specified

Device type

Limits

Units

Min

Max

High-level output voltage

VOH

VCC = 4.5 V, IOH = -2 mA, VIL = 0.8 V, VIH = 2.0 V

02, 04

2.4

V

Low-level output voltage

VOL

VCC = 4.5 V, IOL = 16 mA, VIL = 0.8 V, VIH = 2.0 V

01, 02,

03, 04

0.5

V

Input clamp voltage

VIC

VCC = 4.5 V, IIN= -10 mA, TC = +25°C

01, 02,

03, 04

-1.5

V

Maximum collector cut-off current

ICEX1

VCC = 5.5 V, VOH = 5.2 V

01, 03

100

µA

High impedance (off-state)

output high current

IOHZ

VCC = 5.5 V, VOH = 5.2 V

02, 04

40

µA

High impedance (off-state)

output low current

IOLZ

VCC = 5.5 V, VOL = 0.5 V

02, 04

-40

µA

High level input current

IIH1

VCC = 5.5 V, VIN = 5.5 V

01, 02,

03, 04

50

µA

IIH2

VCC = 5.5 V, VIN = 4.5 V , special programming pin

100

Low level input current

IIL

VCC = 5.5 V,  VIN = 0.5 V

01, 02,

03, 04

-1.0

-250

µA

Short circuit output current

IOS

VCC = 5.5 V,    2/ VO = 0.0 V

02, 04

-10

-100

mA

Supply current

ICC

VCC = 5.5 V, VIN = 0 V, outputs = open

01, 02,

03, 04

130

mA

Propagation delay time, high to low level logic, address to output

tPHL1

VCC = 4.5 V and 5.5 V, CL = 30 pF, see figure 4

01, 02

80

ns

03, 04

35

Propagation delay time, low to high level logic, address to output

tPLH1

VCC = 4.5 V and 5.5 V, CL = 30 pF, see figure 4

01, 02

80

ns

03, 04

35

Propagation delay time, high to low level logic, enable to output

tPHL2

VCC = 4.5 V and 5.5 V, CL = 30 pF, see figure 4

01, 02

50

ns

03, 04

25

Propagation delay time, low to high level logic, enable to

output

tPLH2

VCC = 4.5 V and 5.5 V, CL = 30 pF, see figure 4

01, 02

50

ns

03, 04

25