MIL-M-38510-59 Microcircuits, Digital, Cmos, Decoder, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS logic microcircuits. Two product assurance classes and a choice of case outlines , lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/59D

TABLE I. Electrical performance characteristics.

Test	Symbol	Conditions VSS = 0 V, -55°C ≤ TA ≤ 125°C unless otherwise specified	Device type	Limits		Unit
Test	Symbol		Device type	Min	Max	Unit
Positive clamping input to VDD	VIC (POS)	TA = 25°C, VDD = GND, VSS = Open, Outputs = Open, II = 1 mA	All		1.5	V
Negative clamping input to VSS	VIC (NEG)	TA = 25°C, VDD = Open, VSS = GND, Outputs = Open, II = -1 mA	All		-6.0	V
Quiescent supply current	ISS	VDD = 15 V, see table III	01		-10.0	µA
Quiescent supply current	ISS	VDD = 18 V, see table III	51		-10.0	µA
High level output voltage	VOH1	VDD = 5.0 V, no load	01	4.95		V
	VOH2	VDD = 10.0 V, no load	01	9.95		V
	VOH3	VDD = 15 V, no load	51	14.95		V
Low level output voltage	VOL1	VDD = 5.0 V, no load	01		50	mV
	VOL2	VDD = 10.0 V, no load	01		50	mV
	VOL3	VDD = 15 V, no load	51		50	mV
Input high voltage	VIH1	VDD = 5 V, VOUT = 0.5 V │IOUT│ s 1 µA	51	3.5		V
	VIH2	VDD = 10 V, VOUT = 1.0 V │IOUT│ s 1 µA	51	7.0		V
	VIH3	VDD = 15 V, VOUT = 1.5 V │IOUT│ s 1 µA	51	11.0		V
Input low voltage	VIL1	VDD = 5 V, VOUT = 4.5 V │IOUT│ s 1 µA	51		1.5	V
	VIL2	VDD = 10 V, VOUT = 9.0 V │IOUT│ s 1 µA	51		3.0	V
	VIL3	VDD = 15 V, VOUT = 13.5 V │IOUT│ s 1 µA	51		4.0	V