MIL-M-38510-58 Microcircuits, Digital, Cmos, Switches, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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TABLE III.  Group A inspection for device type 02 - Continued.

1/    Pins not designated may be "High" level logic, "Low" level logic, or open.  Exceptions are as follows: VIC(pos)  tests, the VSS  terminal shall be open; VIC(neg)  tests, the VDD  terminal shall be open.

2/    ISS  measurements shall be run in sequence.

3/    When performing quiescent current measurements (ISS), the meter shall be placed to that all currents flow through the meter.  The outputs during the ISS  measurement shall be open.

4/    VIH1  = 3.8 V at 25°C, 3.6 V at 125°C, 3.95 V at -55°C.

VIH2  = 11.4 V at 25°C, 10.95 V at 125°C, 11.85 V at -55°C. VIL1 = 1.1 V at 25°C, 0.85 V at 125°c, 1.25 V at -55°C.

VIL2 = 3.3 V at 25°C, 2.55 V at 125°C, 4.05 V at -55°C.

5/    The device manufacturer may, at his option, measure IIL  and IIH  at 25°C for each individual input or measure all inputs together.

6/    See figure 5.

7/    See figure 6.

8/    See figure 7.

9/    See figure 8.

10/  Cc  and Cis  - connect capacitance bridge between measured input terminal and VSS, frequency = 1 MHz.

11/  Cos  - connect capacitance bridge between measured output terminal and VSS, frequency = 1 MHz.

12/  Cios  - connect capacitance bridge between measured input and output terminals, frequency = 1 MHz.