MIL-M-38510-504 Microcircuits, Digital, Bipolar Programmable Logic, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, bipolar, programmable logic microcircuits which employ titanium tungsten TiW resistors as the fusible link or programming element. Two product assurance classes and a choice of case outlines and lead materials and finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/504B

c.    Select an input line by specifying inputs and L/R as shown in table VII for circuits A, B, and C.

d.    Select a product line by specifying A0, A1, and A2  one of eight.  Select as shown in table VIII for circuits

A, B, and C.

e.        Pulse the CLOCK pin and verify (with CLOCK at VIL) that the output pins, O0  through O3, are in the state corresponding to an unblown fuse.  Use the minimum timing conditions as specified on figure 6a for circuit A, figure 6b for circuit B, and figure 6c for circuit C.

-      For verified unblown condition, continue procedure from C through E.

-      For verified blown condition, stop procedure.

4.6.2  Programming Algorithm.

a.        Raise output disable pin, OD to VIHH. b.        Lower CLOCK pin to VIL.

c.    Select an input line as specified in 4.6.1c.

d.    Select a product line as specified in 4.6.1d. e.    Raise VCC  to VIHH.

f.     Program the fuse by pulsing the output pins of the selected group - one at a time - to VIHH, see figure 6a

for circuit A, figure 6b for circuit B, and figure 6c for circuit C.

g.    Lower VCC  to 5.0 V.

h.    Repeat this procedure from c until pattern is complete.

4.6.3  First verification pass / for all fuse locations. a.        Raise VCC  to 4.5 V.

b.    Select input line as specified in 4.6.1c.

c.    Select a product line as specified in 4.6.1d.

d.        Pulse the CLOCK pin and verify (with CLOCK at VIL) that the output pins, O0  through O3, are in the correct state.

-      For verified output state, continue procedure.

-      For overblown conditions, stop procedure.

-      For underblown condition, reject part.

e.    Repeat this procedure from b until the entire array is exercised.

4.6.4  High voltage verify / for all fuse locations. a.        Raise VCC  to 5.5 V.

b.    Repeat from 4.6.3b to 4.6.3d until the entire array is exercised.

Programming should be attempted at room temperature, 15°C to 30°C.

To prevent further programming, security fuses may be blown.  Raise VCC  to 6.0 V, and raise pins 1 and 11 to VP

volts for 10 ms to 1s.

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