MIL-M-38510/5048
TA8LE I. Electrical performance characteristics - Continued.
Test |
Symbol |
Conditions 1/ TC = -55°C to +125°C |
Device type |
Limits |
Unit |
|
Min |
Max |
|||||
Propagation delay low to high impedance |
tPLZ |
See figure 5 4/ |
01,03 04 |
--- |
30 |
ns |
05,06 07,09 10 |
--- |
45 |
ns |
|||
Propagation delay high impedance to output high (pin 11 to output enable) |
tPZH |
See figure 5 5/ |
02,03 04,05 06,08 09,10 |
--- |
25 |
ns |
Propagation delay high impedance to output low (pin 11 to output enable) |
tPZL |
02,03 04,05 06,08 09,10 |
--- |
25 |
ns |
|
Propagation delay output high to high impedance (pin 11 to output disable) |
tPHZ |
02,03 04,05 06,08 09,10 |
--- |
25 |
ns |
|
Propagation delay output low to high impedance (pin 11 to output disable) |
tPLZ |
02,03 04,05 06,08 09,10 |
--- |
25 |
ns |
|
Clock to output high |
tPCH |
See figure 5 5/ |
02,03 04 |
--- |
25 |
ns |
05,06 08,09 10 |
--- |
25 |
ns |
|||
Clock to output low |
tPCL |
02,03 04 |
--- |
20 |
ns |
|
05,06 08,09 10 |
--- |
25 |
ns |
|||
Minimum clock pulse width |
tP(CL) |
02,03 04 |
20 |
--- |
ns |
|
05,06 08,09 10 |
25 |
--- |
ns |
|||
Minimum setup time |
tSU |
02,03 04 |
30 |
--- |
ns |
|
05,06 |
55 |
--- |
ns |
|||
08,09 10 |
50 |
--- |
ns |
|||
Minimum hold time |
tH |
See figure 5 5/ |
All |
0 |
--- |
ns |
Maximum clock frequency |
fMAX |
See figure 5 5/ |
02,03 04 |
--- |
20 |
MHz |
05,06 |
--- |
12 |
MHz |
|||
08,09 10 |
--- |
14 |
MHz |
1/ Complete terminal conditions shall be as specified in table III.
2/ Only one output shorted at a time.
3/ I/O terminal leakage is the worst case IIX or IOZH.
4/ Applies to nonregistered outputs only, with internal output enables.
5/ Applies to registered outputs only, with external output enables (pin 11).
5
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